Inventor · disambiguated record
Michael A. Zampaglione
Also filed as: ZAMPAGLIONE MICHAEL A · ZAMPAGLIONE MICHAEL ANTHONY
25 granted patents·302 citations·filing 1990–2019
96Inventor score
Files withVLSI TECHNOLOGY INC6ESILICON CORP3MOSAID TECHNOLOGIES INC3VIRTUAL SILICON TECHNOLOGY INC3CONVERSANT INTELLECTUAL PROPERTY MAN INC2
Top patents by PatentIndex Score
25 records- 0195US7348804B2Low leakage and data retention circuitryMOSAID DELAWARE INC·Filed 2007·Granted Mar 25, 2008·25 cites·33 claims
- 0295US7227383B2Low leakage and data retention circuitryMOSAID DELAWARE INC·Filed 2005·Granted Jun 5, 2007·27 cites·16 claims
- 0393US8253438B2Low leakage and data retention circuitryHOBERMAN BARRY A·Filed 2011·Granted Aug 28, 2012·11 cites·19 claims
- 0487US8854077B2Low leakage and data retention circuitryHOBERMAN BARRY A·Filed 2012·Granted Oct 7, 2014·5 cites·18 claims
- 0587US5231311ADigital output buffer and method with slew rate control and reduced crowbar currentVLSI TECHNOLOGY INC·Filed 1991·Granted Jul 27, 1993·55 cites·4 claims
- 0684US9762261B2Error detection and correction in ternary content addressable memory (TCAM)ESILICON CORP·Filed 2014·Granted Sep 12, 2017·8 cites·18 claims
- 0784US7684262B2SRAM leakage reduction circuitMOSAID TECHNOLOGIES INC·Filed 2007·Granted Mar 23, 2010·12 cites·33 claims
- 0882US8355269B1Pushed-rule bit cells with new functionalityESILICON CORP·Filed 2009·Granted Jan 15, 2013·13 cites·28 claims
- 0982US7592837B2Low leakage and data retention circuitryMOSAID TECHNOLOGIES CORP·Filed 2008·Granted Sep 22, 2009·10 cites·63 claims
- 1081US5111075AReduced switching noise output buffer using diode for quick turn-offVLSI TECHNOLOGY INC·Filed 1991·Granted May 5, 1992·37 cites·19 claims
- 1180US7940081B2Low leakage and data retention circuitryMOSAID TECHNOLOGIES INC·Filed 2009·Granted May 10, 2011·5 cites·20 claims
- 1279US7443197B2Low leakage and data retention circuitryMOSAID TECHNOLOGIES INC·Filed 2007·Granted Oct 28, 2008·6 cites·47 claims
- 1378US8077527B2SRAM leakage reduction circuitZAMPAGLIONE MICHAEL ANTHONY·Filed 2010·Granted Dec 13, 2011·4 cites·13 claims
- 1470US9350349B2Low leakage and data retention circuitryCONVERSANT INTELLECTUAL PROPERTY MAN INC·Filed 2014·Granted May 24, 2016·1 cites·16 claims
- 1568US8416633B2SRAM leakage reduction circuitZAMPAGLIONE MICHAEL ANTHONY·Filed 2011·Granted Apr 9, 2013·2 cites·18 claims
- 1667US6839882B2Method and apparatus for design of integrated circuitsVIRTUAL SILICON TECHNOLOGY INC·Filed 2002·Granted Jan 4, 2005·11 cites·30 claims
- 1765US7051308B2Method and apparatus for integrated circuit design with library cellsVIRTUAL SILICON TECHNOLOGY INC·Filed 2002·Granted May 23, 2006·9 cites·15 claims
- 1863US6766496B2Method and apparatus for integrated circuit design with a software toolVIRTUAL SILICON TECHNOLOGY INC·Filed 2002·Granted Jul 20, 2004·8 cites·17 claims
- 1960US10741249B1Word all zero memorySYNOPSYS INC·Filed 2019·Granted Aug 11, 2020·1 cites·20 claims
- 2055US5245584AMethod and apparatus for compensating for bit line delays in semiconductor memoriesVLSI TECHNOLOGY INC·Filed 1990·Granted Sep 14, 1993·18 cites·10 claims
- 2154US9529669B2Error detection and correction in binary content addressable memory (BCAM)ESILICON CORP·Filed 2014·Granted Dec 27, 2016·0 cites·19 claims
- 2253US9722605B2Low leakage and data retention circuitryCONVERSANT INTELLECTUAL PROPERTY MAN INC·Filed 2016·Granted Aug 1, 2017·0 cites·12 claims
- 2349US5349552AMemory compiler with multiple selectable core elementsVLSI TECHNOLOGY INC·Filed 1991·Granted Sep 20, 1994·12 cites·12 claims
- 2448US5625797AAutomatic optimization of a compiled memory structure based on user selected criteriaVLSI TECHNOLOGY INC·Filed 1993·Granted Apr 29, 1997·14 cites·7 claims
- 2532US5596505AEstimation of pin-to-pin timing for compiled blocksVLSI TECHNOLOGY INC·Filed 1993·Granted Jan 21, 1997·8 cites·20 claims
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →