Inventor · disambiguated record
Min-Liang Chen
Also filed as: CHEN MIN-LIANG
32 granted patents·3 pending applications·965 citations·filing 1988–2009
98Inventor score
Files withMOSEL VITELIC INC21AT & T BELL LAB7PROMOS TECHNOLOGIES INC3LUCENT TECHNOLOGIES INC2AMERICAN TELEPHONE & TELEGRAPH1
Top patents by PatentIndex Score
35 records- 0193US5573965AMethod of fabricating semiconductor devices and integrated circuits using sidewall spacer technologyLUCENT TECHNOLOGIES INC·Filed 1993·Granted Nov 12, 1996·114 cites·17 claims
- 0290US5290720ATransistor with inverse silicide T-gate structureAT & T BELL LAB·Filed 1993·Granted Mar 1, 1994·85 cites·10 claims
- 0388US5827747AMethod for forming LDD CMOS using double spacers and large-tilt-angle ion implantationMOSEL VITELIC INC·Filed 1996·Granted Oct 27, 1998·69 cites·42 claims
- 0483US4905073AIntegrated circuit with improved tub tieAT & T BELL LAB·Filed 1989·Granted Feb 27, 1990·65 cites·13 claims
- 0582US4886765AMethod of making silicides by heating in oxygen to remove contaminationAMERICAN TELEPHONE & TELEGRAPH·Filed 1988·Granted Dec 12, 1989·41 cites·10 claims
- 0681US5930631AMethod of making double-poly MONOS flash EEPROM cellMOSEL VITELIC INC·Filed 1997·Granted Jul 27, 1999·50 cites·4 claims
- 0780US5885866ASelf-registered cylindrical capacitor of high density DRAMsMOSEL VITELIC INC·Filed 1997·Granted Mar 23, 1999·41 cites·18 claims
- 0878US5703388ADouble-poly monos flash EEPROM cellMOSEL VITELIC INC·Filed 1996·Granted Dec 30, 1997·43 cites·6 claims
- 0978US5322807AMethod of making thin film transistors including recrystallization and high pressure oxidationAT & T BELL LAB·Filed 1992·Granted Jun 21, 1994·40 cites·8 claims
- 1077US5679595ASelf-registered capacitor bottom plate-local interconnect scheme for DRAMMOSEL VITELIC INC·Filed 1996·Granted Oct 21, 1997·37 cites·12 claims
- 1176US5789297AMethod of making EEPROM cell device with polyspacer floating gateMOSEL VITELIC INC·Filed 1996·Granted Aug 4, 1998·38 cites·3 claims
- 1276US5200358AIntegrated circuit with planar dielectric layerAT & T BELL LAB·Filed 1991·Granted Apr 6, 1993·58 cites·5 claims
- 1368US7897431B2Stacked semiconductor device and methodPROMOS TECHNOLOGIES INC·Filed 2009·Granted Mar 1, 2011·4 cites·22 claims
- 1468US5686324AProcess for forming LDD CMOS using large-tilt-angle ion implantationMOSEL VITELIC INC·Filed 1996·Granted Nov 11, 1997·37 cites·11 claims
- 1565US6100561AMethod for forming LDD CMOS using double spacers and large-tilt-angle ion implantationMOSEL VITELIC INC·Filed 1998·Granted Aug 8, 2000·21 cites·19 claims
- 1665US5102827AContact metallization of semiconductor integrated-circuit devicesAT & T BELL LAB·Filed 1991·Granted Apr 7, 1992·24 cites·12 claims
- 1763US5514609AThrough glass ROM code implant to reduce product delivering timeMOSEL VITELIC INC·Filed 1994·Granted May 7, 1996·18 cites·30 claims
- 1863US4996167AMethod of making electrical contacts to gate structures in integrated circuitsAT & T BELL LAB·Filed 1990·Granted Feb 26, 1991·32 cites·9 claims
- 1962US5792686AMethod of forming a bit-line and a capacitor structure in an integrated circuitMOSEL VITELIC INC·Filed 1996·Granted Aug 11, 1998·15 cites·23 claims
- 2057US5691223AMethod of fabricating a capacitor over a bit line DRAM processMOSEL VITELIC INC·Filed 1996·Granted Nov 25, 1997·15 cites·33 claims
- 2157US5045898ACMOS integrated circuit having improved isolationAT & T BELL LAB·Filed 1988·Granted Sep 3, 1991·22 cites·5 claims
- 2254US6020231AMethod for forming LDD CMOSMOSEL VITELIC INC·Filed 1997·Granted Feb 1, 2000·15 cites·12 claims
- 2352US5681772AThrough glass ROM code implant to reduce product delivering timeMOSEL VITELIC INC·Filed 1996·Granted Oct 28, 1997·10 cites·18 claims
- 2450US5966632AMethod of forming borderless metal to contact structureMOSEL VITELIC INC·Filed 1997·Granted Oct 12, 1999·19 cites·4 claims
- 2549US5926712AProcess for fabricating MOS device having short channelMOSEL VITELIC INC·Filed 1996·Granted Jul 20, 1999·16 cites·13 claims
- 2647US6100126AMethod of making a resistor utilizing a polysilicon plug formed with a high aspect ratioMOSEL VITELIC INC·Filed 1997·Granted Aug 8, 2000·10 cites·9 claims
- 2746US2009011561A1Method of fabricating high-voltage mos having doubled-diffused drainPROMOS TECHNOLOGIES INC·Filed 2007·Application pending·0 cites
- 2846US2009011564A1Method of forming a gate oxide layerPROMOS TECHNOLOGIES INC·Filed 2007·Application pending·0 cites
- 2939US6107193ACompletely removal of TiN residue on dual damascence processMOSEL VITELIC INC·Filed 1998·Granted Aug 22, 2000·12 cites·8 claims
- 3037US6271556B1High density memory structureMOSEL VITELIC INC·Filed 1998·Granted Aug 7, 2001·3 cites·7 claims
- 3137US5880496ASemiconductor having self-aligned polysilicon electrode layerMOSEL VITELIC INC·Filed 1997·Granted Mar 9, 1999·4 cites·12 claims
- 3236US2001028075A1High density memory structureFiled 2001·Application pending·0 cites
- 3335US5625215ASRAM cell with balanced load resistorsLUCENT TECHNOLOGIES INC·Filed 1995·Granted Apr 29, 1997·4 cites·4 claims
- 3432US5691562AThrough glass ROM code implant to reduce product delivering timeMOSEL VITELIC INC·Filed 1995·Granted Nov 25, 1997·2 cites·16 claims
- 3529US5972746AMethod for manufacturing semiconductor devices using double-charged implantationMOSEL VITELIC INC·Filed 1996·Granted Oct 26, 1999·1 cites·17 claims
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