Inventor · disambiguated record
Menno Spijker
Also filed as: SPIJKER MENNO · SPIJKER MENNO T · SPIJKER MENNO TJEERD
14 granted patents·298 citations·filing 1995–2023
93Inventor score
Files withINTEGRATED DEVICE TECH7ZARLINK SEMICONDUCTOR INC3RENESAS ELECTRONICS AMERICA INC2MITEL CORP1X INTEGRATED CIRCUITS BV1
Top patents by PatentIndex Score
14 records- 0195US9369270B1Dual-coupled phase-locked loops for clock and packet-based synchronizationINTEGRATED DEVICE TECH·Filed 2014·Granted Jun 14, 2016·40 cites·10 claims
- 0294US9479182B1Methods and apparatus for synchronizing operations using separate asynchronous signalsINTEGRATED DEVICE TECH·Filed 2015·Granted Oct 25, 2016·31 cites·20 claims
- 0393US9628255B1Methods and apparatus for transmitting data over a clock signalINTEGRATED DEVICE TECH·Filed 2015·Granted Apr 18, 2017·32 cites·20 claims
- 0489US7369002B2Phase locked loop fast lock methodZARLINK SEMICONDUCTOR INC·Filed 2006·Granted May 6, 2008·28 cites·16 claims
- 0585US6959064B2Clock recovery PLLZARLINK SEMICONDUCTOR INC·Filed 2000·Granted Oct 25, 2005·26 cites·18 claims
- 0683US10355699B2Hitless re-arrangements in coupled digital phase-locked loopsINTEGRATED DEVICE TECH·Filed 2017·Granted Jul 16, 2019·4 cites·16 claims
- 0783US5602884ADigital phase locked loopMITEL CORP·Filed 1995·Granted Feb 11, 1997·82 cites·10 claims
- 0880US10666269B2Hitless re-arrangements in coupled digital phase-locked loopsINTEGRATED DEVICE TECH·Filed 2019·Granted May 26, 2020·3 cites·20 claims
- 0972US10476509B2Time slotted bus system for multiple coupled digital phase-locked loopsINTEGRATED DEVICE TECH·Filed 2017·Granted Nov 12, 2019·2 cites·20 claims
- 1067US7242740B2Digital phase-locked loop with master-slave modesZARLINK SEMICONDUCTOR INC·Filed 2003·Granted Jul 10, 2007·15 cites·26 claims
- 1161US5905388AFrequency synthesizerX INTEGRATED CIRCUITS BV·Filed 1996·Granted May 18, 1999·35 cites·12 claims
- 1260US12015414B2Dual digital phase lock loop with unmodulation couplingRENESAS ELECTRONICS AMERICA INC·Filed 2022·Granted Jun 18, 2024·0 cites·20 claims
- 1359US10637482B2Time slotted bus system for multiple coupled digital phase-locked loopsINTEGRATED DEVICE TECH·Filed 2019·Granted Apr 28, 2020·0 cites·20 claims
- 1438US12381566B2Cross-coupled timing synchronization platformRENESAS ELECTRONICS AMERICA INC·Filed 2023·Granted Aug 5, 2025·0 cites·20 claims
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →