Inventor · disambiguated record
Fabrice Lallement
Also filed as: LALLEMENT FABRICE
7 granted patents·3 pending applications·26 citations·filing 2006–2014
81Inventor score
Files withSOITEC SILICON ON INSULATOR5DELPRAT DANIEL1GAUDIN GWELTAZ1LALLEMENT FABRICE1SHAHEEN MOHAMAD1
Top patents by PatentIndex Score
10 records- 0183US8999090B2Process for bonding two substratesSOITEC SILICON ON INSULATOR·Filed 2013·Granted Apr 7, 2015·10 cites·16 claims
- 0281US8735946B2Substrate having a charged zone in an insulating buried layerSOITEC SILICON ON INSULATOR·Filed 2013·Granted May 27, 2014·4 cites·16 claims
- 0376US8535996B2Substrate having a charged zone in an insulating buried layerSHAHEEN MOHAMAD·Filed 2008·Granted Sep 17, 2013·6 cites·11 claims
- 0468US9716029B2Method for transferring a layer of a semiconductor and substrate comprising a confinement structureLALLEMENT FABRICE·Filed 2012·Granted Jul 25, 2017·4 cites·16 claims
- 0565US8946053B2Method for reducing irregularities at the surface of a layer transferred from a source substrate to a glass-based support substrateDELPRAT DANIEL·Filed 2011·Granted Feb 3, 2015·2 cites·14 claims
- 0653US2014225182A1Substrate having a charged zone in an insulating buried layerSOITEC SILICON ON INSULATOR·Filed 2014·Application pending·0 cites
- 0748US2011183493A1Process for manufacturing a structure comprising a germanium layer on a substrateSOITEC SILICON ON INSULATOR·Filed 2009·Application pending·0 cites
- 0844US2011000612A1Processing for bonding two substratesGAUDIN GWELTAZ·Filed 2009·Application pending·0 cites
- 0943US8343850B2Process for fabricating a substrate comprising a deposited buried oxide layerSOITEC SILICON ON INSULATOR·Filed 2008·Granted Jan 1, 2013·0 cites·16 claims
- 1043US7416950B2MOS transistor forming methodST MICROELECTRONICS SA·Filed 2006·Granted Aug 26, 2008·0 cites·50 claims
Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →