Inventor · disambiguated record
Alan Holesovsky
Also filed as: HOLESOVSKY ALAN · HOLESOVSKY ALAN LEE
2 granted patents·1 pending application·32 citations·filing 2004–2009
62Inventor score
Top patents by PatentIndex Score
3 records- 0172US7480878B2Method and system for layout versus schematic validation of integrated circuit designsLSI LOGIC CORPORTION·Filed 2005·Granted Jan 20, 2009·11 cites·10 claims
- 0272US7149989B2Method of early physical design validation and identification of texted metal short circuits in an integrated circuit designLSI LOGIC CORP·Filed 2004·Granted Dec 12, 2006·21 cites·12 claims
- 0341US2010270671A1Manipulating fill patterns during routingLSI CORP·Filed 2009·Application pending·0 cites
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