Inventor · disambiguated record
Gaurav Agarwal
Also filed as: AGARWAL GAURAV · AGARWAL GAURAV H
9 granted patents·3 pending applications·150 citations·filing 2002–2023
87Inventor score
Files withAGERE SYSTEMS INC4CIRRUS LOGIC INT SEMICONDUCTOR LTD3FREESCALE SEMICONDUCTOR INC1INMOBI PTE LTD1NXP USA INC1
Top patents by PatentIndex Score
12 records- 0195US7426185B1Backpressure mechanism for switching fabricAGERE SYSTEMS INC·Filed 2003·Granted Sep 16, 2008·64 cites·58 claims
- 0291US7480246B2Characterizing transmission of data segments within a switch fabric using multiple counters for each destination nodeAGERE SYSTEMS INC·Filed 2007·Granted Jan 20, 2009·27 cites·22 claims
- 0383US8726114B1Testing of SRAMSORACLE INT CORP·Filed 2012·Granted May 13, 2014·9 cites·20 claims
- 0483US7319695B1Deficit-based striping algorithmAGERE SYSTEMS INC·Filed 2002·Granted Jan 15, 2008·37 cites·64 claims
- 0582US7983287B2Backpressure mechanism for switching fabricAGERE SYSTEMS INC·Filed 2008·Granted Jul 19, 2011·7 cites·19 claims
- 0673US12512790B2Output common-mode control loop for fast and smooth transition in multi-mode amplifiersCIRRUS LOGIC INT SEMICONDUCTOR LTD·Filed 2023·Granted Dec 30, 2025·0 cites·10 claims
- 0772US7779316B2Method of testing memory array at operational speed using scanORACLE AMERICA INC·Filed 2007·Granted Aug 17, 2010·6 cites·19 claims
- 0851US12163984B2Compensating current monitor for electronic systems having mode-sensitive selection of current-sensing inputsCIRRUS LOGIC INT SEMICONDUCTOR LTD·Filed 2021·Granted Dec 10, 2024·0 cites·22 claims
- 0951US2024354483A1Buffer compatible with skew critical protocols implemented in an integrated circuit and methods for routing metal lines to the buffer in the integrated circuitNXP USA INC·Filed 2023·Application pending·0 cites
- 1046US10552419B2Method and system for performing an operation using map reduceINMOBI PTE LTD·Filed 2014·Granted Feb 4, 2020·0 cites·20 claims
- 1139US2019011291A1Reducing noise in a capacitive sensorCIRRUS LOGIC INT SEMICONDUCTOR LTD·Filed 2018·Application pending·0 cites
- 1239US2010231256A1Spare cell library design for integrated circuitFREESCALE SEMICONDUCTOR INC·Filed 2009·Application pending·0 cites
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →