Inventor · disambiguated record
Edward Robert Vanderslice
Also filed as: VANDERSLICE EDWARD R · VANDERSLICE EDWARD ROBERT
5 granted patents·143 citations·filing 1995–1998
83Inventor score
Files withIBM4
Top patents by PatentIndex Score
5 records- 0166US5802569AComputer system having cache prefetching amount based on CPU request typesIBM·Filed 1996·Granted Sep 1, 1998·52 cites·12 claims
- 0260US6092139APassive backplane capable of being configured to a variable data path width corresponding to a data size of the pluggable CPU boardFiled 1998·Granted Jul 18, 2000·23 cites·15 claims
- 0354US5778422AData processing system memory controller that selectively caches data associated with write requestsIBM·Filed 1996·Granted Jul 7, 1998·32 cites·19 claims
- 0448US5745728AProcess or renders repeat operation instructions non-cacheableIBM·Filed 1995·Granted Apr 28, 1998·23 cites·8 claims
- 0538US5901296ADistributed scheduling for the transfer of real time, loss sensitive and non-real time data over a busIBM·Filed 1996·Granted May 4, 1999·13 cites·4 claims
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →