Inventor · disambiguated record
Douglas D. Williams
Also filed as: WILLIAMS DOUGLAS · WILLIAMS DOUGLAS D
20 granted patents·974 citations·filing 1987–2018
96Inventor score
Top patents by PatentIndex Score
20 records- 0194US9628609B2Device function disablement during vehicle motionIBM·Filed 2016·Granted Apr 18, 2017·8 cites·20 claims
- 0292US5297269ACache coherency protocol for multi processor computer systemDIGITAL EQUIPMENT COMPANY·Filed 1993·Granted Mar 22, 1994·299 cites·27 claims
- 0391US5148536APipeline having an integral cache which processes cache misses and loads data in parallelDIGITAL EQUIPMENT CORP·Filed 1988·Granted Sep 15, 1992·126 cites·27 claims
- 0487US10397396B2Device function disablement during vehicle motionIBM·Filed 2018·Granted Aug 27, 2019·3 cites·20 claims
- 0587US9270809B2Device function disablement during vehicle motionIBM·Filed 2014·Granted Feb 23, 2016·9 cites·19 claims
- 0685US4858116AMethod and apparatus for managing multiple lock indicators in a multiprocessor computer systemDIGITAL EQUIPMENT CORP·Filed 1987·Granted Aug 15, 1989·75 cites·11 claims
- 0782US10063687B2Device function disablement during vehicle motionIBM·Filed 2017·Granted Aug 28, 2018·3 cites·20 claims
- 0881US4937733AMethod and apparatus for assuring adequate access to system resources by processors in a multiprocessor computer systemDIGITAL EQUIPMENT CORP·Filed 1987·Granted Jun 26, 1990·69 cites·16 claims
- 0976US5430888APipeline utilizing an integral cache for transferring data to and from a registerDIGITAL EQUIPMENT CORP·Filed 1993·Granted Jul 4, 1995·65 cites·2 claims
- 1072US4953072ANode for servicing interrupt request messages on a pended busDIGITAL EQUIPMENT CORP·Filed 1987·Granted Aug 28, 1990·46 cites·30 claims
- 1171US4949239ASystem for implementing multiple lock indicators on synchronous pended bus in multiprocessor computer systemDIGITAL EQUIPMENT CORP·Filed 1987·Granted Aug 14, 1990·46 cites·8 claims
- 1270US5068781AMethod and apparatus for managing multiple lock indicators in a multiprocessor computer systemDIGITAL EQUIPMENT CORP·Filed 1989·Granted Nov 26, 1991·37 cites·14 claims
- 1364US5179674AMethod and apparatus for predicting valid performance of virtual-address to physical-address translationsDIGITAL EQUIPMENT CORP·Filed 1988·Granted Jan 12, 1993·29 cites·6 claims
- 1464US4774422AHigh speed low pin count bus interfaceDIGITAL EQUIPMENT CORP·Filed 1987·Granted Sep 27, 1988·33 cites·17 claims
- 1562US5146597AApparatus and method for servicing interrupts utilizing a pended busDIGITAL EQUIPMENT CORP·Filed 1991·Granted Sep 8, 1992·40 cites·35 claims
- 1661US4941083AMethod and apparatus for initiating interlock read transactions on a multiprocessor computer systemDIGITAL EQUIPMENT CORP·Filed 1987·Granted Jul 10, 1990·29 cites·12 claims
- 1754US5428794AInterrupting node for providing interrupt requests to a pended busDIGITAL EQUIPMENT CORP·Filed 1994·Granted Jun 27, 1995·25 cites·23 claims
- 1845US4829515AHigh performance low pin count bus interfaceDIGITAL EQUIPMENT CORP·Filed 1987·Granted May 9, 1989·14 cites·14 claims
- 1940US5341510ACommander node method and apparatus for assuring adequate access to system resources in a multiprocessorDIGITAL EQUIPMENT CORP·Filed 1993·Granted Aug 23, 1994·12 cites·27 claims
- 2034US5319791ASystem for predicting memory fault in vector processor by sensing indication signal to scalar processor to continue a next vector instruction issuanceDIGITAL EQUIPMENT CORP·Filed 1992·Granted Jun 7, 1994·6 cites·4 claims
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →