Inventor · disambiguated record

Bruce E. Hayden

Also filed as: HAYDEN BRUCE E

2 granted patents·1 pending application·37 citations·filing 1998–2003

62Inventor score

Technology areasG06F

Files withBULL HN INFORMATION SYST2

Top patents by PatentIndex Score

3 records

0157US6754859B2Computer processor read/alter/rewrite optimization cache invalidate signalsBULL HN INFORMATION SYST·Filed 2001·Granted Jun 22, 2004·6 cites·12 claims
0251US6339752B1Processor emulation instruction counter virtual memory address translationBULL HN INFORMATION SYST·Filed 1998·Granted Jan 15, 2002·31 cites·19 claims
0341US2004111656A1Computer processor read/alter/rewrite optimization cache invalidate signalsFiled 2003·Application pending·0 cites

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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →