Inventor · disambiguated record
Rakesh Malik
Also filed as: MALIK RAKESH · MALIK RAKESH KUMAR
16 granted patents·3 pending applications·68 citations·filing 1998–2017
90Inventor score
Files withST MICROELECTRONICS INT NV8ST MICROELECTRONICS PVT LTD5HEDDES MARCO2ST MICROELECTRONICS ASIA2TRANSWITCH CORP2
Top patents by PatentIndex Score
19 records- 0193US9379728B1Self-calibrated digital-to-analog converterST MICROELECTRONICS INT NV·Filed 2015·Granted Jun 28, 2016·23 cites·24 claims
- 0291US9258008B2Adaptive delay based asynchronous successive approximation analog-to-digital converterST MICROELECTRONICS INT NV·Filed 2014·Granted Feb 9, 2016·12 cites·21 claims
- 0377US10148277B1Current steering digital to analog converter with decoder free quad switchingST MICROELECTRONICS INT NV·Filed 2017·Granted Dec 4, 2018·4 cites·15 claims
- 0474US7698355B2Minimal area integrated circuit implementation of a polyphase interpolation filter using coefficients symmetryST MICROELECTRONICS PVT LTD·Filed 2005·Granted Apr 13, 2010·9 cites·11 claims
- 0563US10222415B2Generic width independent parallel checker for a device under testST MICROELECTRONICS INT NV·Filed 2016·Granted Mar 5, 2019·1 cites·26 claims
- 0663US7558287B2Combined hardware and software implementation of link capacity adjustment scheme (LCAS) in SONET (synchronous optical network) virtual concatenation (VCAT)TRANSWITCH CORP·Filed 2005·Granted Jul 7, 2009·3 cites·12 claims
- 0762US7917569B2Device for implementing a sum of products expressionST MICROELECTRONICS PVT LTD·Filed 2005·Granted Mar 29, 2011·3 cites·26 claims
- 0853US2010191814A1System-On-A-Chip Employing A Network Of Nodes That Utilize Receive Side Flow Control Over Channels For Messages Communicated TherebetweenHEDDES MARCO·Filed 2009·Application pending·0 cites
- 0952US2010191911A1System-On-A-Chip Having an Array of Programmable Processing Elements Linked By an On-Chip Network with Distributed On-Chip Shared Memory and External Shared MemoryHEDDES MARCO·Filed 2009·Application pending·0 cites
- 1051US7652535B2Continuous time common mode feedback circuit, system, and methodST MICROELECTRONICS PVT LTD·Filed 2007·Granted Jan 26, 2010·2 cites·14 claims
- 1150US7737780B2Scheme for improving settling behavior of gain boosted fully differential operational amplifierST MICROELECTRONICS PVT LTD·Filed 2007·Granted Jun 15, 2010·2 cites·12 claims
- 1247US10198331B2Generic bit error rate analyzer for use with serial data linksST MICROELECTRONICS INT NV·Filed 2017·Granted Feb 5, 2019·0 cites·20 claims
- 1345US9300317B2Adaptive delay based asynchronous successive approximation analog-to-digital converterST MICROELECTRONICS INT NV·Filed 2015·Granted Mar 29, 2016·0 cites·22 claims
- 1445US7671676B2Continuous time common-mode feedback module and method with wide swing and good linearityST MICROELECTRONICS PVT LTD·Filed 2007·Granted Mar 2, 2010·1 cites·14 claims
- 1542US7007053B1Area efficient realization of coefficient architecture for bit-serial FIR, IIR filters and combinational/sequential logic structure with zero latency clock outputST MICROELECTRONICS ASIA·Filed 1998·Granted Feb 28, 2006·8 cites·11 claims
- 1641US10572440B2High operation frequency, area efficient and cost effective content addressable memory architectureST MICROELECTRONICS INT NV·Filed 2017·Granted Feb 25, 2020·0 cites·20 claims
- 1738US7672315B2Methods and apparatus for deskewing VCAT/LCAS membersTRANSWITCH CORP·Filed 2005·Granted Mar 2, 2010·0 cites·24 claims
- 1834US10404278B2Parallel pipeline logic circuit for generating CRC values utilizing lookup tableST MICROELECTRONICS INT NV·Filed 2016·Granted Sep 3, 2019·0 cites·7 claims
- 1934US2005193046A1Area efficient realization of coefficient architecture for bit-serial fir, IIR filters and combinational/sequential logic structure with zero latency clock outputST MICROELECTRONICS ASIA·Filed 2004·Application pending·0 cites
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →