Inventor · disambiguated record
Era K. Nangia
Also filed as: NANGIA ERA · NANGIA ERA K · NANGIA ERA KASTURIA
18 granted patents·1 pending application·361 citations·filing 1992–2024
95Inventor score
Top patents by PatentIndex Score
19 records- 0195US11934265B2Memory error tracking and loggingAPPLE INC·Filed 2022·Granted Mar 19, 2024·4 cites·20 claims
- 0292US7594079B2Data cache virtual hint way prediction, and applications thereofMIPS TECH INC·Filed 2006·Granted Sep 22, 2009·26 cites·22 claims
- 0390US9632939B2Data cache virtual hint way prediction, and applications thereofARM FINANCE OVERSEAS LTD·Filed 2015·Granted Apr 25, 2017·7 cites·15 claims
- 0489US9092343B2Data cache virtual hint way prediction, and applications thereofYU MENG-BING·Filed 2009·Granted Jul 28, 2015·19 cites·12 claims
- 0589US5418973ADigital computer system with cache controller coordinating both vector and scalar operationsDIGITAL EQUIPMENT CORP·Filed 1992·Granted May 23, 1995·163 cites·7 claims
- 0687US10268481B2Load/store unit for a processor, and applications thereofARM FINANCE OVERSEAS LTD·Filed 2018·Granted Apr 23, 2019·4 cites·22 claims
- 0781US9946547B2Load/store unit for a processor, and applications thereofYU MENG BING·Filed 2006·Granted Apr 17, 2018·11 cites·22 claims
- 0881US7246287B1Full scan solution for latched-based designMIPS TECH INC·Filed 2002·Granted Jul 17, 2007·20 cites·20 claims
- 0977US12253913B2Memory error tracking and loggingAPPLE INC·Filed 2024·Granted Mar 18, 2025·0 cites·20 claims
- 1077US7769958B2Avoiding livelock using intervention messages in multiple core processorsMIPS TECH INC·Filed 2007·Granted Aug 3, 2010·8 cites·23 claims
- 1175US10768939B2Load/store unit for a processor, and applications thereofARM FINANCE OVERSEAS LTD·Filed 2019·Granted Sep 8, 2020·1 cites·20 claims
- 1274US10430340B2Data cache virtual hint way prediction, and applications thereofARM FINANCE OVERSEAS LTD·Filed 2017·Granted Oct 1, 2019·1 cites·14 claims
- 1374US6883156B1Apparatus and method for relative position annotation of standard cell components to facilitate datapath designMIPS TECH INC·Filed 2002·Granted Apr 19, 2005·30 cites·29 claims
- 1464US10108548B2Processors and methods for cache sparing storesIMAGINATION TECH LTD·Filed 2015·Granted Oct 23, 2018·1 cites·21 claims
- 1564US7543207B2Full scan solution for latched-based designMIPS TECH INC·Filed 2007·Granted Jun 2, 2009·3 cites·5 claims
- 1658US5721864APrefetching instructions between cachesIBM·Filed 1995·Granted Feb 24, 1998·37 cites·15 claims
- 1744US2008082793A1Detection and prevention of write-after-write hazards, and applications thereofMIPS TECH INC·Filed 2006·Application pending·0 cites
- 1843US5860150AInstruction pre-fetching of a cache line within a processorIBM·Filed 1995·Granted Jan 12, 1999·17 cites·24 claims
- 1936US5796976ATemporary storage having entries smaller than memory busDIGITAL EQUIPMENT CORP·Filed 1996·Granted Aug 18, 1998·9 cites·30 claims
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