Inventor · disambiguated record
Edward W. Chencinski
Also filed as: CHENCINSKI EDWARD · CHENCINSKI EDWARD W · CHENCINSKI EDWARD WILLIAM
17 granted patents·6 pending applications·125 citations·filing 1994–2020
91Inventor score
Top patents by PatentIndex Score
23 records- 0188US6984991B2Initialization of a bidirectional, self-timed parallel interface with automatic testing of AC differential wire pairsIBM·Filed 2004·Granted Jan 10, 2006·41 cites·28 claims
- 0280US10552054B2Peripheral component interconnect express (PCIE) network with input/output (I/O) chaining to reduce communication time within execution of I/O channel operationsIBM·Filed 2018·Granted Feb 4, 2020·2 cites·19 claims
- 0378US9501069B2Control of solid state memory device temperature using queue depth managementIBM·Filed 2014·Granted Nov 22, 2016·4 cites·17 claims
- 0478US8644136B2Sideband error signalingIBM·Filed 2012·Granted Feb 4, 2014·5 cites·14 claims
- 0577US9619166B2Control of solid state memory device temperature using queue depth managementIBM·Filed 2016·Granted Apr 11, 2017·2 cites·1 claims
- 0663US10949097B2Peripheral component interconnect express (PCIE) network with input/output (I/O) operation chaining to reduce communication time within execution of I/O channel operationsIBM·Filed 2019·Granted Mar 16, 2021·0 cites·20 claims
- 0763US6963977B2Circuits and methods for modular exponentiationIBM·Filed 2000·Granted Nov 8, 2005·11 cites·10 claims
- 0861US5590309AStorage protection cache and backing storage having system control element data cache pipeline and storage protection bits in a stack array with a stack directory for the stack arrayIBM·Filed 1994·Granted Dec 31, 1996·45 cites·10 claims
- 0959US8880957B2Facilitating processing in a communications environment using stop signalingCHENCINSKI EDWARD W·Filed 2012·Granted Nov 4, 2014·1 cites·20 claims
- 1058US8787155B2Sideband error signalingCHENCINSKI EDWARD W·Filed 2011·Granted Jul 22, 2014·1 cites·18 claims
- 1154US11379390B1In-line data packet transformationsIBM·Filed 2020·Granted Jul 5, 2022·0 cites·20 claims
- 1253US9423804B2Control of solid state memory device temperature using queue depth managementIBM·Filed 2016·Granted Aug 23, 2016·0 cites·1 claims
- 1352US2015261451A1Lifecycle management of solid state memory adaptorsIBM·Filed 2014·Application pending·0 cites
- 1448US11321146B2Executing an atomic primitive in a multi-core processor systemIBM·Filed 2019·Granted May 3, 2022·0 cites·20 claims
- 1548US2016188254A1Lifecycle management of solid state memory adaptorsIBM·Filed 2016·Application pending·0 cites
- 1646US2008282005A1Method and processing unit for inter-chip communicationCHENCINSKI EDWARD·Filed 2008·Application pending·0 cites
- 1744US11681567B2Method and processor system for executing a TELT instruction to access a data item during execution of an atomic primitiveIBM·Filed 2019·Granted Jun 20, 2023·0 cites·13 claims
- 1843US8880956B2Facilitating processing in a communications environment using stop signalingCHENCINSKI EDWARD W·Filed 2011·Granted Nov 4, 2014·0 cites·19 claims
- 1943US2020356485A1Executing multiple data requests of multiple-core processorsIBM·Filed 2019·Application pending·0 cites
- 2042US8582778B2Integrated key serverCHENCINSKI EDWARD W·Filed 2011·Granted Nov 12, 2013·0 cites·20 claims
- 2142US2013339573A1Optimizing write performance to flash memoryANDERSON CLARK A·Filed 2012·Application pending·0 cites
- 2241US2013339784A1Error recovery in redundant storage systemsBICKELMAN CRAIG A·Filed 2012·Application pending·0 cites
- 2340US6081904AMethod for insuring data integrity during transfersIBM·Filed 1998·Granted Jun 27, 2000·13 cites·12 claims
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →