Inventor · disambiguated record
Scott A. Segan
Also filed as: SEGAN SCOTT A
17 granted patents·4 pending applications·226 citations·filing 1997–2012
93Inventor score
Files withAGERE SYSTEMS INC4LUCENT TECHNOLOGIES INC4LSI CORP3AGERE SYST GUARDIAN CORP2AGERE SYSTEMS LLC2
Top patents by PatentIndex Score
21 records- 0189US8161431B2Integrated circuit performance enhancement using on-chip adaptive voltage scalingBUONPANE MICHAEL S·Filed 2008·Granted Apr 17, 2012·30 cites·22 claims
- 0289US6732311B1On-chip debuggerAGERE SYSTEMS INC·Filed 2000·Granted May 4, 2004·60 cites·21 claims
- 0381US8350589B2Critical-path circuit for performance monitoringAGERE SYSTEMS LLC·Filed 2009·Granted Jan 8, 2013·9 cites·17 claims
- 0474US5945850AEdge signal restoration circuit and methodLUCENT TECHNOLOGIES INC·Filed 1997·Granted Aug 31, 1999·28 cites·25 claims
- 0570US9158359B2Adaptive voltage scaling using a serial interfaceBUONPANE MICHAEL S·Filed 2012·Granted Oct 13, 2015·3 cites·22 claims
- 0667US8315830B2On-chip variation, speed and power regulatorMARTIN RICHARD P·Filed 2008·Granted Nov 20, 2012·4 cites·15 claims
- 0762US6011733AAdaptive addressable circuit redundancy method and apparatusLUCENT TECHNOLOGIES INC·Filed 1998·Granted Jan 4, 2000·21 cites·43 claims
- 0856US6091271AFrequency doubling method and apparatusLUCENT TECHNOLOGIES INC·Filed 1998·Granted Jul 18, 2000·14 cites·27 claims
- 0955US8680907B2Delay circuit having reduced duty cycle distortionCHLIPALA JAMES D·Filed 2008·Granted Mar 25, 2014·3 cites·23 claims
- 1054US6438672B1Memory aliasing method and apparatusAGERE SYST GUARDIAN CORP·Filed 1999·Granted Aug 20, 2002·27 cites·24 claims
- 1147US8773160B2Critical-path circuit for performance monitoringAGERE SYSTEMS LLC·Filed 2012·Granted Jul 8, 2014·0 cites·18 claims
- 1244US6513082B1Adaptive bus arbitration using history bufferAGERE SYSTEMS INC·Filed 1999·Granted Jan 28, 2003·22 cites·14 claims
- 1343US6833286B2Semiconductor device with variable pin locationsAGERE SYSTEMS INC·Filed 2002·Granted Dec 21, 2004·3 cites·8 claims
- 1442US2014136128A1Apparatus and method for sensing transistor aging effectsLSI CORP·Filed 2012·Application pending·0 cites
- 1541US7786814B2Method and apparatus for deriving an integrated circuit (IC) clock with a frequency offset from an IC system clockAGERE SYSTEMS INC·Filed 2008·Granted Aug 31, 2010·0 cites·19 claims
- 1640US2014132303A1Apparatus and method for sensing transistor mismatchLSI CORP·Filed 2012·Application pending·0 cites
- 1736US6465884B1Semiconductor device with variable pin locationsAGERE SYST GUARDIAN CORP·Filed 2000·Granted Oct 15, 2002·1 cites·12 claims
- 1836US2011002186A1Secure electrically programmable fuse and method of operating the sameLSI CORP·Filed 2009·Application pending·0 cites
- 1933US2008129357A1Adaptive Integrated Circuit Clock Skew CorrectionCHLIPALA JAMES D·Filed 2006·Application pending·0 cites
- 2030US9070684B2Integrated circuit power grid with improved routing resources and bypass capacitanceSEGAN SCOTT A·Filed 2012·Granted Jun 30, 2015·0 cites·22 claims
- 2129US6023576AFast transient circuit simulation of electronic circuits including a crystalLUCENT TECHNOLOGIES INC·Filed 1997·Granted Feb 8, 2000·1 cites·24 claims
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →