Inventor · disambiguated record
Thomas W. Liston
Also filed as: LISTON THOMAS F · LISTON THOMAS W
12 granted patents·1 pending application·84 citations·filing 2002–2014
90Inventor score
Top patents by PatentIndex Score
13 records- 0189US8766703B1Method and apparatus for sensing on-chip characteristicsYANG JIANAN·Filed 2013·Granted Jul 1, 2014·10 cites·20 claims
- 0284US7940599B2Dual port memory deviceFREESCALE SEMICONDUCTOR INC·Filed 2009·Granted May 10, 2011·18 cites·18 claims
- 0382US8685800B2Single event latch-up prevention techniques for a semiconductor deviceYANG JIANAN·Filed 2012·Granted Apr 1, 2014·6 cites·15 claims
- 0479US7440354B2Memory with level shifting word line driver and method thereofFREESCALE SEMICONDUCTOR INC·Filed 2006·Granted Oct 21, 2008·12 cites·15 claims
- 0578US8717829B2System and method for soft error detection in memory devicesSHARMA ASHISH·Filed 2012·Granted May 6, 2014·7 cites·19 claims
- 0677US9026808B2Memory with word level power gatingYANG JIANAN·Filed 2012·Granted May 5, 2015·6 cites·20 claims
- 0769US6590818B1Method and apparatus for soft defect detection in a memoryMOTOROLA INC·Filed 2002·Granted Jul 8, 2003·18 cites·20 claims
- 0868US9317087B2Memory column drowsy controlRAMARAJU RAVINDRARAJ·Filed 2012·Granted Apr 19, 2016·2 cites·19 claims
- 0960US7706207B2Memory with level shifting word line driver and method thereofFREESCALE SEMICONDUCTOR INC·Filed 2008·Granted Apr 27, 2010·4 cites·13 claims
- 1052US9263100B2Bypass system and method that mimics clock to data memory read timingFREESCALE SEMICONDUCTOR INC·Filed 2013·Granted Feb 16, 2016·1 cites·20 claims
- 1149US9123545B2Semiconductor device with single-event latch-up prevention circuitryYANG JIANAN·Filed 2014·Granted Sep 1, 2015·0 cites·18 claims
- 1242US2004103314A1System and method for network intrusion preventionFiled 2002·Application pending·0 cites
- 1336US7554841B2Circuit for storing information in an integrated circuit and method thereforFREESCALE SEMICONDUCTOR INC·Filed 2006·Granted Jun 30, 2009·0 cites·20 claims
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →