Inventor · disambiguated record
Arthur D. Tuminaro
Also filed as: TUMINARO ARTHUR · TUMINARO ARTHUR D
10 granted patents·94 citations·filing 1991–2010
89Inventor score
Top patents by PatentIndex Score
10 records- 0189US7113433B2Local bit select with suppression of fast read before writeIBM·Filed 2005·Granted Sep 26, 2006·23 cites·2 claims
- 0280US7336546B2Global bit select circuit with dual read and write bit line pairsIBM·Filed 2005·Granted Feb 26, 2008·11 cites·1 claims
- 0376US7170774B2Global bit line restore timing scheme and circuitIBM·Filed 2005·Granted Jan 30, 2007·9 cites·20 claims
- 0475US7272030B2Global bit line restore timing scheme and circuitIBM·Filed 2006·Granted Sep 18, 2007·8 cites·12 claims
- 0572US7463537B2Global bit select circuit interface with dual read and write bit line pairsIBM·Filed 2007·Granted Dec 9, 2008·7 cites·1 claims
- 0661US8233331B2Single clock dynamic compare circuitCHAN YUEN H·Filed 2010·Granted Jul 31, 2012·2 cites·16 claims
- 0754US7006403B2Self timed bit and read/write pulse stretchersIBM·Filed 2003·Granted Feb 28, 2006·8 cites·26 claims
- 0846US5627484ACMOS sense amplifierIBM·Filed 1995·Granted May 6, 1997·11 cites·16 claims
- 0945US6958943B1Programmable sense amplifier timing generatorIBM·Filed 2004·Granted Oct 25, 2005·5 cites·4 claims
- 1041US5239506ALatch and data out driver for memory arraysIBM·Filed 1991·Granted Aug 24, 1993·10 cites·4 claims
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →