Inventor · disambiguated record
Bert Reents
Also filed as: REENTS BERT
7 granted patents·1 pending application·7 citations·filing 2003–2024
74Inventor score
Top patents by PatentIndex Score
8 records- 0178US8784634B2Electrolytic method for filling holes and cavities with metalsREENTS BERT·Filed 2007·Granted Jul 22, 2014·5 cites·25 claims
- 0276US12439528B2Method of preparing a high density interconnect printed circuit board including microvias filled with copperATOTECH DEUTSCHLAND GMBH & CO KG·Filed 2024·Granted Oct 7, 2025·0 cites·13 claims
- 0372US9445510B2Galvanic process for filling through-holes with metals, in particular of printed circuit boards with copperREENTS BERT·Filed 2005·Granted Sep 13, 2016·2 cites·22 claims
- 0459US12245383B2Method of preparing a high density interconnect printed circuit board including microvias filled with copperATOTECH DEUTSCHLAND GMBH & CO KG·Filed 2020·Granted Mar 4, 2025·0 cites·12 claims
- 0547US9526183B2Galvanic process for filling through-holes with metals, in particular of printed circuit boards with copperATOTECH DEUTSCHLAND GMBH·Filed 2016·Granted Dec 20, 2016·0 cites·20 claims
- 0641US12063751B2Manufacturing sequences for high density interconnect printed circuit boards and a high density interconnect printed circuit boardATOTECH DEUTSCHLAND GMBH & CO KG·Filed 2020·Granted Aug 13, 2024·0 cites·19 claims
- 0730US7767065B2Device and method for electrolytically treating an at least superficially electrically conducting work pieceATOTECH DEUTSCHLAND GMBH·Filed 2003·Granted Aug 3, 2010·0 cites·31 claims
- 0828US2006151328A1Method of electroplating a workpiece having high-aspect ratio holesREENTS BERT·Filed 2004·Application pending·0 cites
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →