Inventor · disambiguated record
Christopher A. Krygowski
Also filed as: KRYGOWSKI CHRISTOPHER · KRYGOWSKI CHRISTOPHER A
59 granted patents·6 pending applications·318 citations·filing 1997–2017
98Inventor score
Top patents by PatentIndex Score
65 records- 0194US7908518B2Method, system and computer program product for failure analysis implementing automated comparison of multiple reference modelsIBM·Filed 2008·Granted Mar 15, 2011·43 cites·20 claims
- 0289US8904246B2Variable acknowledge rate to reduce bus contention in presence of communication errorsBUSABA FADI Y·Filed 2012·Granted Dec 2, 2014·10 cites·20 claims
- 0388US9130740B2Variable acknowledge rate to reduce bus contention in presence of communication errorsIBM·Filed 2013·Granted Sep 8, 2015·8 cites·13 claims
- 0486US8954797B2Reconfigurable recovery modes in high availability processorsBUSABA FADI Y·Filed 2012·Granted Feb 10, 2015·8 cites·13 claims
- 0585US8930950B2Management of migrating threads within a computing environment to transform multiple threading mode processors to single thread mode processorsBUSABA FADI Y·Filed 2012·Granted Jan 6, 2015·7 cites·20 claims
- 0683US9152510B2Hardware recovery in multi-threaded processorBUSABA FADI Y·Filed 2012·Granted Oct 6, 2015·7 cites·17 claims
- 0780US9519485B2Confidence threshold-based opposing branch path execution for branch predictionIBM·Filed 2014·Granted Dec 13, 2016·4 cites·6 claims
- 0880US9348599B2Confidence threshold-based opposing branch path execution for branch predictionIBM·Filed 2013·Granted May 24, 2016·4 cites·11 claims
- 0979US9063906B2Thread sparing between cores in a multi-threaded processorIBM·Filed 2012·Granted Jun 23, 2015·4 cites·11 claims
- 1079US9021495B2Management of resources within a computing environmentIBM·Filed 2013·Granted Apr 28, 2015·3 cites·13 claims
- 1176US7853635B2Modular binary multiplier for signed and unsigned operands of variable widthsIBM·Filed 2007·Granted Dec 14, 2010·6 cites·14 claims
- 1275US9864639B2Management of resources within a computing environmentIBM·Filed 2016·Granted Jan 9, 2018·1 cites·21 claims
- 1375US8935698B2Management of migrating threads within a computing environment to transform multiple threading mode processors to single thread mode processorsIBM·Filed 2012·Granted Jan 13, 2015·3 cites·10 claims
- 1473US7167968B2Storage pre-alignment and EBCDIC, ASCII and unicode basic latin conversions for packed decimal dataIBM·Filed 2004·Granted Jan 23, 2007·20 cites·20 claims
- 1573US7085917B2Multi-pipe dispatch and execution of complex instructions in a superscalar processorIBM·Filed 2003·Granted Aug 1, 2006·18 cites·8 claims
- 1671US6829627B2Floating point unit for multiple data architecturesIBM·Filed 2001·Granted Dec 7, 2004·17 cites·17 claims
- 1770US9176837B2In situ processor re-characterizationIBM·Filed 2012·Granted Nov 3, 2015·2 cites·13 claims
- 1870US9152518B2In situ processor re-characterizationBUSABA FADI Y·Filed 2012·Granted Oct 6, 2015·2 cites·19 claims
- 1969US9213608B2Hardware recovery in multi-threaded processorIBM·Filed 2013·Granted Dec 15, 2015·2 cites·8 claims
- 2069US8918678B2Functional testing of a processor designIBM·Filed 2013·Granted Dec 23, 2014·2 cites·20 claims
- 2169US8806139B2Cache set replacement order based on temporal set recordingBUSABA FADI Y·Filed 2012·Granted Aug 12, 2014·2 cites·20 claims
- 2269US7082517B2Superscalar microprocessor having multi-pipe dispatch and execution unitIBM·Filed 2003·Granted Jul 25, 2006·14 cites·13 claims
- 2368US9021493B2Management of resources within a computing environmentBUSABA FADI Y·Filed 2012·Granted Apr 28, 2015·1 cites·23 claims
- 2468US7266580B2Modular binary multiplier for signed and unsigned operands of variable widthsIBM·Filed 2003·Granted Sep 4, 2007·10 cites·21 claims
- 2568US7010676B2Last iteration loop branch prediction upon counter threshold and resolution upon counter oneIBM·Filed 2003·Granted Mar 7, 2006·13 cites·16 claims
- 2666US9141551B2Specific prefetch algorithm for a chip having a parent core and a scout coreIBM·Filed 2014·Granted Sep 22, 2015·1 cites·11 claims
- 2764US9229722B2Major branch instructions with transactional memoryBUSABA FADI Y·Filed 2012·Granted Jan 5, 2016·1 cites·16 claims
- 2863US7412476B2Decimal multiplication for superscaler processorsIBM·Filed 2006·Granted Aug 12, 2008·2 cites·4 claims
- 2962US10489209B2Management of resources within a computing environmentIBM·Filed 2017·Granted Nov 26, 2019·0 cites·20 claims
- 3061US7996203B2Method, system, and computer program product for out of order instruction address stride prefetch performance verificationIBM·Filed 2008·Granted Aug 9, 2011·2 cites·20 claims
- 3161US7949972B2Method, system and computer program product for exploiting orthogonal control vectors in timing driven synthesisIBM·Filed 2008·Granted May 24, 2011·2 cites·20 claims
- 3260US6044454AIEEE compliant floating point unitIBM·Filed 1998·Granted Mar 28, 2000·39 cites·20 claims
- 3358US7167889B2Decimal multiplication for superscaler processorsIBM·Filed 2003·Granted Jan 23, 2007·5 cites·7 claims
- 3457US9928132B2Dynamic accessing of execution elements through modification of issue rulesIBM·Filed 2014·Granted Mar 27, 2018·0 cites·8 claims
- 3557US9798545B2Anticipated prefetching for a parent core in a multi-core chipIBM·Filed 2014·Granted Oct 24, 2017·0 cites·11 claims
- 3657US9501323B2Management of resources within a computing environmentIBM·Filed 2015·Granted Nov 22, 2016·0 cites·18 claims
- 3756US9128851B2Prefetching for multiple parent cores in a multi-core chipIBM·Filed 2014·Granted Sep 8, 2015·0 cites·9 claims
- 3855US9043641B2Reconfigurable recovery modes in high availability processorsIBM·Filed 2013·Granted May 26, 2015·0 cites·7 claims
- 3955US8904102B2Process identifier-based cache information transferIBM·Filed 2013·Granted Dec 2, 2014·0 cites·8 claims
- 4055US7149767B2Method and system for determining quotient digits for decimal division in a superscaler processorIBM·Filed 2003·Granted Dec 12, 2006·4 cites·11 claims
- 4154US9792120B2Anticipated prefetching for a parent core in a multi-core chipIBM·Filed 2013·Granted Oct 17, 2017·0 cites·8 claims
- 4254US9304848B2Dynamic accessing of execution elements through modification of issue rulesIBM·Filed 2013·Granted Apr 5, 2016·0 cites·12 claims
- 4354US9141550B2Specific prefetch algorithm for a chip having a parent core and a scout coreIBM·Filed 2013·Granted Sep 22, 2015·0 cites·6 claims
- 4454US9116816B2Prefetching for a parent core in a multi-core chipIBM·Filed 2013·Granted Aug 25, 2015·0 cites·6 claims
- 4554US6697833B2Floating-point multiplier for de-normalized inputsIBM·Filed 2001·Granted Feb 24, 2004·3 cites·7 claims
- 4653US9164854B2Thread sparing between cores in a multi-threaded processorIBM·Filed 2013·Granted Oct 20, 2015·0 cites·8 claims
- 4753US9135180B2Prefetching for multiple parent cores in a multi-core chipIBM·Filed 2013·Granted Sep 15, 2015·0 cites·5 claims
- 4853US9128852B2Prefetching for a parent core in a multi-core chipIBM·Filed 2014·Granted Sep 8, 2015·0 cites·11 claims
- 4953US8904100B2Process identifier-based cache data transferBUSABA FADI Y·Filed 2012·Granted Dec 2, 2014·0 cites·13 claims
- 5052US9286138B2Major branch instructionsIBM·Filed 2012·Granted Mar 15, 2016·0 cites·14 claims
Showing the top 50 of 65 patent records by PatentIndex Score.
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →