Inventor · disambiguated record
Vinod K. Kathail
Also filed as: KATHAIL VINOD · KATHAIL VINOD K · KATHAIL VINOD KUMAR
33 granted patents·2 pending applications·1,306 citations·filing 1992–2022
98Inventor score
Top patents by PatentIndex Score
35 records- 0197US10802807B1Control and reconfiguration of data flow graphs on heterogeneous computing platformXILINX INC·Filed 2019·Granted Oct 13, 2020·25 cites·20 claims
- 0296US11281440B1Control and reconfiguration of data flow graphs on heterogeneous computing platformXILINX INC·Filed 2020·Granted Mar 22, 2022·5 cites·20 claims
- 0396US6507947B1Programmatic synthesis of processor element arraysHEWLETT PACKARD CO·Filed 1999·Granted Jan 14, 2003·402 cites·27 claims
- 0494US12159057B2Implementing data flows of an application across a memory hierarchy of a data processing arrayXILINX INC·Filed 2022·Granted Dec 3, 2024·4 cites·20 claims
- 0594US9880966B1Encapsulating metadata of a platform for application-specific tailoring and reuse of the platform in an integrated circuitXILINX INC·Filed 2015·Granted Jan 30, 2018·14 cites·20 claims
- 0694US9652570B1Automatic implementation of a customized system-on-chipXILINX INC·Filed 2015·Granted May 16, 2017·21 cites·20 claims
- 0793US8762916B1Automatic generation of a data transfer networkXILINX INC·Filed 2013·Granted Jun 24, 2014·20 cites·20 claims
- 0892US9223921B1Compilation of HLL code with hardware accelerated functionsXILINX INC·Filed 2014·Granted Dec 29, 2015·18 cites·20 claims
- 0990US9147024B1Hardware and software cosynthesis performance estimationXILINX INC·Filed 2014·Granted Sep 29, 2015·14 cites·20 claims
- 1090US6408428B1Automated design of processor systems using feedback from internal measurements of candidate systemsHEWLETT PACKARD CO·Filed 1999·Granted Jun 18, 2002·161 cites·17 claims
- 1189US6651222B2Automatic design of VLIW processorsHEWLETT PACKARD DEVELOPMENT CO·Filed 2002·Granted Nov 18, 2003·45 cites·20 claims
- 1289US6385757B1Auto design of VLIW processorsHEWLETT PACKARD CO·Filed 1999·Granted May 7, 2002·120 cites·24 claims
- 1388US9805152B1Compilation of system designsXILINX INC·Filed 2016·Granted Oct 31, 2017·6 cites·20 claims
- 1487US11204745B2Dataflow graph programming environment for a heterogenous processing systemXILINX INC·Filed 2019·Granted Dec 21, 2021·4 cites·18 claims
- 1584US10860766B1Compilation flow for a heterogeneous multi-core architectureXILINX INC·Filed 2019·Granted Dec 8, 2020·4 cites·20 claims
- 1683US6581187B2Automatic design of VLIW processorsHEWLETT PACKARD DEVELOPMENT CO·Filed 2002·Granted Jun 17, 2003·27 cites·22 claims
- 1777US10635769B1Hardware and software event tracing for a system-on-chipXILINX INC·Filed 2015·Granted Apr 28, 2020·3 cites·19 claims
- 1876US11188312B2Hardware-software design flow with high-level synthesis for heterogeneous and programmable devicesXILINX INC·Filed 2019·Granted Nov 30, 2021·2 cites·18 claims
- 1974US10891414B2Hardware-software design flow for heterogeneous and programmable devicesXILINX INC·Filed 2019·Granted Jan 12, 2021·2 cites·20 claims
- 2074US5778219AMethod and system for propagating exception status in data registers and for detecting exceptions from speculative operations with non-speculative operationsHEWLETT PACKARD CO·Filed 1996·Granted Jul 7, 1998·68 cites·20 claims
- 2173US5404484ACache system for reducing memory latency timesHEWLETT PACKARD CO·Filed 1992·Granted Apr 4, 1995·63 cites·7 claims
- 2272US11687327B2Control and reconfiguration of data flow graphs on heterogeneous computing platformXILINX INC·Filed 2022·Granted Jun 27, 2023·0 cites·20 claims
- 2372US7107199B2Method and system for the design of pipelines of processorsHEWLETT PACKARD DEVELOPMENT CO·Filed 2002·Granted Sep 12, 2006·17 cites·17 claims
- 2472US5692169AMethod and system for deferring exceptions generated during speculative executionHEWLETT PACKARD CO·Filed 1994·Granted Nov 25, 1997·56 cites·19 claims
- 2566US11645053B2Hardware-software design flow with high-level synthesis for heterogeneous and programmable devicesXILINX INC·Filed 2021·Granted May 9, 2023·0 cites·20 claims
- 2665US6772106B1Retargetable computer design systemHEWLETT PACKARD DEVELOPMENT CO·Filed 1999·Granted Aug 3, 2004·45 cites·30 claims
- 2763US5664135AApparatus and method for reducing delays due to branchesHEWLETT PACKARD CO·Filed 1994·Granted Sep 2, 1997·39 cites·17 claims
- 2863US2022058005A1Dataflow graph programming environment for a heterogenous processing systemXILINX INC·Filed 2021·Application pending·0 cites
- 2960US12135990B2Modeling and compiling tensor processing applications for a computing platform using multi-layer adaptive data flow graphsXILINX INC·Filed 2022·Granted Nov 5, 2024·0 cites·17 claims
- 3060US5850553AReducing the number of executed branch instructions in a code sequenceHEWLETT PACKARD CO·Filed 1996·Granted Dec 15, 1998·35 cites·36 claims
- 3160US5475823AMemory processor that prevents errors when load instructions are moved in the execution sequenceHEWLETT PACKARD CO·Filed 1994·Granted Dec 12, 1995·34 cites·9 claims
- 3258US6766445B2Storage system for use in custom loop accelerators and the likeHEWLETT PACKARD DEVELOPMENT CO·Filed 2001·Granted Jul 20, 2004·6 cites·15 claims
- 3350US6023751AComputer system and method for evaluating predicates and Boolean expressionsHEWLETT PACKARD CO·Filed 1995·Granted Feb 8, 2000·24 cites·27 claims
- 3450US5999738AFlexible scheduling of non-speculative instructionsHEWLETT PACKARD CO·Filed 1997·Granted Dec 7, 1999·22 cites·36 claims
- 3548US2024211302A1Dynamic provisioning of portions of a data processing array for spatial and temporal sharingXILINX INC·Filed 2022·Application pending·0 cites
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →