Inventor · disambiguated record
Norman Mause
Also filed as: MAUSE NORMAN · MAUSE NORMAN E
3 granted patents·19 citations·filing 2003–2004
67Inventor score
Top patents by PatentIndex Score
3 records- 0154US6958541B2Low gate resistance layout procedure for RF transistor devicesLSI LOGIC CORP·Filed 2003·Granted Oct 25, 2005·8 cites·13 claims
- 0251US7424690B2Interconnect integrity verificationLSI CORP·Filed 2004·Granted Sep 9, 2008·5 cites·22 claims
- 0351US7082589B2Method of generating a schematic driven layout for a hierarchical integrated circuit designLSI LOGIC CORP·Filed 2003·Granted Jul 25, 2006·6 cites·4 claims
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →