Inventor · disambiguated record
Robert Neal Carlton Broberg, Iii
Also filed as: BROBERG III ROBERT N · BROBERG III ROBERT N C · BROBERG III ROBERT NEAL · BROBERG III ROBERT NEAL CARLTO
13 granted patents·241 citations·filing 1999–2008
92Inventor score
Top patents by PatentIndex Score
13 records- 0187US7430725B2Suite of tools to design integrated circuitsLSI CORP·Filed 2005·Granted Sep 30, 2008·18 cites·23 claims
- 0287US7055113B2Simplified process to design integrated circuitsLSI LOGIC CORP·Filed 2002·Granted May 30, 2006·51 cites·17 claims
- 0385US6658519B1Bus bridge with embedded input/output (I/O) and transaction tracing capabilitiesIBM·Filed 2000·Granted Dec 2, 2003·52 cites·30 claims
- 0481US6959428B2Designing and testing the interconnection of addressable devices of integrated circuitsLSI LOGIC CORP·Filed 2003·Granted Oct 25, 2005·36 cites·20 claims
- 0567US7017093B2Circuit and/or method for automated use of unallocated resources for a trace buffer applicationLSI LOGIC CORP·Filed 2002·Granted Mar 21, 2006·13 cites·20 claims
- 0666US6601122B1Exceptions and interrupts with dynamic priority and vector routingIBM·Filed 2000·Granted Jul 29, 2003·12 cites·7 claims
- 0762US7584460B2Process and apparatus for abstracting IC design filesLSI CORP·Filed 2003·Granted Sep 1, 2009·12 cites·5 claims
- 0853US7149218B2Cache line cut through of limited life data in a data processing systemIBM·Filed 2001·Granted Dec 12, 2006·3 cites·19 claims
- 0948US7434180B2Virtual data representation through selective bidirectional translationLSI CORP·Filed 2004·Granted Oct 7, 2008·0 cites·10 claims
- 1047US8156454B2Virtual data representation through selective bidirectional translationBROBERG ROBERT N·Filed 2008·Granted Apr 10, 2012·0 cites·8 claims
- 1145US6453366B1Method and apparatus for direct memory access (DMA) with dataflow blocking for usersIBM·Filed 1999·Granted Sep 17, 2002·17 cites·12 claims
- 1242US6381648B1Method and apparatus for filtering ethernet framesIBM·Filed 1999·Granted Apr 30, 2002·16 cites·6 claims
- 1339US6289430B1Method and apparatus for target addressing and translation in a non-uniform memory environment with user defined target tagsIBM·Filed 1999·Granted Sep 11, 2001·11 cites·20 claims
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →