Inventor · disambiguated record
Erik Unterborn
Also filed as: UNTERBORN ERIK · UNTERBORN ERIK S
7 granted patents·3 pending applications·6 citations·filing 2008–2024
74Inventor score
Top patents by PatentIndex Score
10 records- 0182US11303285B1Multi-mode design and operation for transistor mismatch immunityIBM·Filed 2021·Granted Apr 12, 2022·2 cites·9 claims
- 0279US2025014621A1Non-linear polar material based multi-capacitor bit-cell with multi-way sharing of gain element with series transistorKEPLER COMPUTING INC·Filed 2024·Application pending·0 cites
- 0379US2025022500A1Non-linear polar material based multi-capacitor bit-cell with shared gain element and access transistorKEPLER COMPUTING INC·Filed 2024·Application pending·0 cites
- 0476US11527953B1Higher yielding improved matching reference circuit especially applicable for high speed mixed signal applications and phase locked loops and charge pumpsIBM·Filed 2021·Granted Dec 13, 2022·1 cites·6 claims
- 0575US12334127B2Non-linear polar material based multi-capacitor high density bit-cellKEPLER COMPUTING INC·Filed 2023·Granted Jun 17, 2025·0 cites·20 claims
- 0659US8994117B2Moat construction to reduce noise coupling to a quiet supplyIBM·Filed 2012·Granted Mar 31, 2015·1 cites·6 claims
- 0758US7409662B1Systems and methods involving designing shielding profiles for integrated circuitsIBM·Filed 2008·Granted Aug 5, 2008·2 cites·3 claims
- 0847US2009210844A1Systems and methods involving designing integrated circuitsIBM·Filed 2008·Application pending·0 cites
- 0944US12218120B2Device mismatch mitigation for medium range and beyond distancesIBM·Filed 2021·Granted Feb 4, 2025·0 cites·12 claims
- 1044US7949989B2Methods, systems and computer program products for layout device matching driven by a schematic editorIBM·Filed 2008·Granted May 24, 2011·0 cites·1 claims
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →