Inventor · disambiguated record
Michael Alfano
Also filed as: ALFANO MICHAEL · ALFANO MICHAEL S
7 granted patents·14 pending applications·22 citations·filing 2012–2025
79Inventor score
Top patents by PatentIndex Score
21 records- 0196US11830817B2Creating interconnects between dies using a cross-over die and through-die viasADVANCED MICRO DEVICES INC·Filed 2020·Granted Nov 28, 2023·4 cites·20 claims
- 0284US9806014B2Interposer with beyond reticle field conductor padsALFANO MICHAEL S·Filed 2016·Granted Oct 31, 2017·8 cites·15 claims
- 0382US8704353B2Thermal management of stacked semiconductor chips with electrically non-functional interconnectsSU MICHAEL·Filed 2012·Granted Apr 22, 2014·7 cites·24 claims
- 0481US9793239B2Semiconductor workpiece with selective backside metallizationSU MICHAEL Z·Filed 2015·Granted Oct 17, 2017·3 cites·22 claims
- 0575US12334455B2Semiconductor package with integrated capacitorsCHIPLETZ INC·Filed 2024·Granted Jun 17, 2025·0 cites·13 claims
- 0675US2025293133A1Through Package Vertical Interconnect and Method of Making SameCHIPLETZ INC·Filed 2025·Application pending·0 cites
- 0773US2025273604A1Semiconductor Package with Integrated CapacitorsCHIPLETZ INC·Filed 2025·Application pending·0 cites
- 0871US2024071940A1Creating interconnects between dies using a cross-over die and through-die viasADVANCED MICRO DEVICES INC·Filed 2023·Application pending·0 cites
- 0967US2023343687A1Through Package Vertical Interconnect and Method of Making SameCHIPLETZ INC·Filed 2023·Application pending·0 cites
- 1066US12288756B2Semiconductor package with integrated capacitorsCHIPLETZ INC·Filed 2022·Granted Apr 29, 2025·0 cites·10 claims
- 1158US2025210548A1Embedded voltage regulation moduleCHIPLETZ INC·Filed 2024·Application pending·0 cites
- 1253US2024120293A1Method and Apparatus for Prevention, Cessation, Detection, and Monitoring of Cracks in SubstratesCHIPLETZ INC·Filed 2023·Application pending·0 cites
- 1352US2024258041A1Low-Equivalent-Series-Resistance Capacitors with Solid-State Current Collectors Using Conductive InksCHIPLETZ INC·Filed 2024·Application pending·0 cites
- 1451US2024337799A1Co-Packaging Assembly and Method for Attaching Photonic Dies/Modules to Multi-Chip Active/Passive SubstrateCHIPLETZ INC·Filed 2023·Application pending·0 cites
- 1551US2023395305A1Inductors Embedded in Package Substrate and Board and Method and System for Manufacturing the SameCHIPLETZ INC·Filed 2023·Application pending·0 cites
- 1647US2023411174A1Package Assembly and Method of Attaching Multi-Height Dies/Modules to Multi-Chip Active/Passive SubstrateCHIPLETZ INC·Filed 2022·Application pending·0 cites
- 1738US10290606B2Interposer with identification systemALFANO MICHAEL·Filed 2012·Granted May 14, 2019·0 cites·19 claims
- 1838US2013256913A1Die stacking with coupled electrical interconnects to align proximity interconnectsBLACK BRYAN·Filed 2012·Application pending·0 cites
- 1938US2013256895A1Stacked semiconductor components with universal interconnect footprintSU MICHAEL·Filed 2012·Application pending·0 cites
- 2030US2013342231A1Semiconductor substrate with onboard test structureALFANO MICHAEL·Filed 2012·Application pending·0 cites
- 2124US2016329312A1Semiconductor chip with offloaded logicO'MULLAN SEAN M·Filed 2015·Application pending·0 cites
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →