Inventor · disambiguated record
Rinus Tek Po Lee
Also filed as: LEE RINUS · LEE RINUS T P · LEE RINUS TEK PO
14 granted patents·3 pending applications·46 citations·filing 2002–2020
88Inventor score
Top patents by PatentIndex Score
17 records- 0196US10134739B1Memory array with buried bitlines below vertical field effect transistors of memory cells and a method of forming the memory arrayGLOBALFOUNDRIES INC·Filed 2017·Granted Nov 20, 2018·21 cites·18 claims
- 0288US10211045B1Microwave annealing of flowable oxides with trap layersGLOBALFOUNDRIES INC·Filed 2018·Granted Feb 19, 2019·5 cites·20 claims
- 0381US8829567B2Metal alloy with an abrupt interface to III-V semiconductorSEMATECH INC·Filed 2012·Granted Sep 9, 2014·6 cites·19 claims
- 0477US10418365B2Memory array with buried bitlines below vertical field effect transistors of memory cells and a method of forming the memory arrayGLOBALFOUNDRIES INC·Filed 2018·Granted Sep 17, 2019·1 cites·20 claims
- 0568US10204904B2Methods, apparatus and system for vertical finFET device with reduced parasitic capacitanceGLOBALFOUNDRIES INC·Filed 2017·Granted Feb 12, 2019·1 cites·20 claims
- 0668US10134876B2FinFETs with strained channels and reduced on state resistanceGLOBALFOUNDRIES INC·Filed 2017·Granted Nov 20, 2018·1 cites·15 claims
- 0759US7015132B2Forming an electrical contact on an electronic componentAGENCY SCIENCE TECH & RES·Filed 2002·Granted Mar 21, 2006·11 cites·35 claims
- 0855US11145716B1Semiconductor devices with low resistance gate structuresGLOBALFOUNDRIES US INC·Filed 2020·Granted Oct 12, 2021·0 cites·19 claims
- 0953US11004953B2Mask-free methods of forming structures in a semiconductor deviceGLOBALFOUNDRIES US INC·Filed 2019·Granted May 11, 2021·0 cites·11 claims
- 1052US11545574B2Single diffusion breaks including stacked dielectric layersGLOBALFOUNDRIES US INC·Filed 2020·Granted Jan 3, 2023·0 cites·20 claims
- 1152US10896853B2Mask-free methods of forming structures in a semiconductor deviceGLOBALFOUNDRIES INC·Filed 2019·Granted Jan 19, 2021·0 cites·19 claims
- 1251US11362178B2Asymmetric source drain structuresGLOBALFOUNDRIES US INC·Filed 2019·Granted Jun 14, 2022·0 cites·20 claims
- 1349US11094598B2Multiple threshold voltage devicesGLOBALFOUNDRIES US INC·Filed 2019·Granted Aug 17, 2021·0 cites·19 claims
- 1449US10121706B2Semiconductor structure including two-dimensional and three-dimensional bonding materialsGLOBALFOUNDRIES INC·Filed 2016·Granted Nov 6, 2018·0 cites·9 claims
- 1545US2015111372A1Phosphorus and arsenic doping of semiconductor materialsSEMATECH INC·Filed 2014·Application pending·0 cites
- 1644US2015333128A1N-type iii-v semiconductor structures having ultra-shallow junctions and methods of forming sameSEMATECH INC·Filed 2014·Application pending·0 cites
- 1739US2020312775A1Semiconductor device having a barrier layer made of two dimensional materialsGLOBALFOUNDRIES INC·Filed 2019·Application pending·0 cites
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