Inventor · disambiguated record
Koushik Banerjee
Also filed as: BANERJEE KOUSHIK
25 granted patents·3 pending applications·381 citations·filing 1993–2024
96Inventor score
Top patents by PatentIndex Score
28 records- 0187US5557502AStructure of a thermally and electrically enhanced plastic ball grid array packageINTEL CORP·Filed 1995·Granted Sep 17, 1996·105 cites·16 claims
- 0286US6440770B1Integrated circuit packageINTEL CORP·Filed 2000·Granted Aug 27, 2002·46 cites·12 claims
- 0384US11170853B2Modified write voltage for memory devicesMICRON TECHNOLOGY INC·Filed 2020·Granted Nov 9, 2021·2 cites·25 claims
- 0483US7045890B2Heat spreader and stiffener having a stiffener extensionINTEL CORP·Filed 2001·Granted May 16, 2006·35 cites·67 claims
- 0573US10248351B1Set technique for phase change memoryINTEL CORP·Filed 2017·Granted Apr 2, 2019·1 cites·24 claims
- 0673US5734559AStaggered bond finger design for fine pitch integrated circuit packagesINTEL CORP·Filed 1996·Granted Mar 31, 1998·47 cites·4 claims
- 0770US12040014B2Configurable resistivity for lines in a memory deviceMICRON TECHNOLOGY INC·Filed 2022·Granted Jul 16, 2024·0 cites·17 claims
- 0870US10360977B2Tailoring current magnitude and duration during a programming pulse for a memory deviceINTEL CORP·Filed 2018·Granted Jul 23, 2019·2 cites·26 claims
- 0969US2024379157A1Configurable resistivity for lines in a memory deviceMICRON TECHNOLOGY INC·Filed 2024·Application pending·0 cites
- 1064US11705197B2Modified write voltage for memory devicesMICRON TECHNOLOGY INC·Filed 2021·Granted Jul 18, 2023·0 cites·20 claims
- 1164US10884640B2Set technique for phase change memoryINTEL CORP·Filed 2019·Granted Jan 5, 2021·1 cites·27 claims
- 1264US10796761B2Tailoring current magnitude and duration during a programming pulse for a memory deviceINTEL CORP·Filed 2019·Granted Oct 6, 2020·1 cites·26 claims
- 1361US11495293B2Configurable resistivity for lines in a memory deviceMICRON TECHNOLOGY INC·Filed 2020·Granted Nov 8, 2022·0 cites·20 claims
- 1461US5787575AMethod for plating a bond finger of an intergrated circuit packageINTEL CORP·Filed 1996·Granted Aug 4, 1998·28 cites·5 claims
- 1559US2020211032A1Tamperproof, counterfeiting resistant product labelNOOS TECH PRIVATE LIMITED·Filed 2019·Application pending·0 cites
- 1656US6043559AIntegrated circuit package which contains two in plane voltage busses and a wrap around conductive strip that connects a bond finger to one of the bussesINTEL CORP·Filed 1996·Granted Mar 28, 2000·20 cites·14 claims
- 1755US10553286B2Tailoring timing offsets during a programming pulse for a memory deviceINTEL CORP·Filed 2018·Granted Feb 4, 2020·1 cites·28 claims
- 1853US11100984B2Non volatile cross point memory having word line pass transistor with multiple active statesINTEL CORP·Filed 2020·Granted Aug 24, 2021·0 cites·20 claims
- 1952US6031283AIntegrated circuit packageINTEL CORP·Filed 1996·Granted Feb 29, 2000·19 cites·16 claims
- 2052US5811880ADesign for mounting discrete components inside an integrated circuit package for frequency governing of microprocessorsINTEL CORP·Filed 1997·Granted Sep 22, 1998·20 cites·8 claims
- 2152US5444602AAn electronic package that has a die coupled to a lead frame by a dielectric tape and a heat sink that providees both an electrical and a thermal path between the die and teh lead frameINTEL CORP·Filed 1994·Granted Aug 22, 1995·20 cites·4 claims
- 2250US6459563B1Method and apparatus for polygonal heat slugINTEL CORP·Filed 2001·Granted Oct 1, 2002·3 cites·20 claims
- 2347US5895977ABond pad functional layout on die to improve package manufacturability and assemblyINTEL CORP·Filed 1996·Granted Apr 20, 1999·12 cites·16 claims
- 2446US6214638B1Bond pad functional layout on die to improve package manufacturability and assemblyINTEL CORP·Filed 1998·Granted Apr 10, 2001·11 cites·19 claims
- 2538US2019206491A1Techniques to mitigate selection failure for a memory deviceINTEL CORP·Filed 2019·Application pending·0 cites
- 2631US6256189B1Heat slug design which facilitates mounting of discrete components on a package without losing lands or pins in the packageINTEL CORP·Filed 1996·Granted Jul 3, 2001·2 cites·13 claims
- 2731US5345363AMethod and apparatus of coupling a die to a lead frame with a tape automated bonded tape that has openings which expose portions of the tape leadsINTEL CORP·Filed 1993·Granted Sep 6, 1994·2 cites·7 claims
- 2828US6403891B1Metallization removal under the laser mark area for substratesINTEL CORP·Filed 1998·Granted Jun 11, 2002·3 cites·16 claims
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →