Inventor · disambiguated record
Jean-Marc Dortu
Also filed as: DORTU JEAN-MARC
22 granted patents·5 pending applications·541 citations·filing 1984–2006
95Inventor score
Top patents by PatentIndex Score
27 records- 0197US6100733AClock latency compensation circuit for DDR timingSIEMENS AG·Filed 1998·Granted Aug 8, 2000·177 cites·1 claims
- 0290US6043694ALock arrangement for a calibrated DLL in DDR SDRAM applicationsSIEMENS AG·Filed 1998·Granted Mar 28, 2000·76 cites·17 claims
- 0387US6781220B2Printed circuit board for semiconductor memory deviceINFINEON TECHNOLOGIES AG·Filed 2002·Granted Aug 24, 2004·55 cites·28 claims
- 0487US6229364B1Frequency range trimming for a delay lineINFINEON TECHNOLOGIES CORP·Filed 1999·Granted May 8, 2001·54 cites·24 claims
- 0586US7047371B2Integrated memory having a memory cell array containing a plurality of memory banks, and circuit configuration having an integrated memoryINFINEON TECHNOLOGIES AG·Filed 2003·Granted May 16, 2006·49 cites·12 claims
- 0668US7467254B2Semiconductor memory device with write protected memory banksINFINEON TECHNOLOGIES AG·Filed 2005·Granted Dec 16, 2008·4 cites·13 claims
- 0768US5978931AVariable domain redundancy replacement configuration for a memory deviceIBM·Filed 1997·Granted Nov 2, 1999·29 cites·26 claims
- 0864US6252443B1Delay element using a delay locked loopINFINEON TECHNOLOGIES CORP·Filed 1999·Granted Jun 26, 2001·25 cites·22 claims
- 0960US4612560AField effect transistor operating in the enhancement modeTHOMSON CSF·Filed 1984·Granted Sep 16, 1986·15 cites·8 claims
- 1055US6127866ADelay-locked-loop (DLL) having symmetrical rising and falling clock edge type delaysINFINEON TECHNOLOGIES CORP·Filed 1999·Granted Oct 3, 2000·14 cites·14 claims
- 1155US5881003AMethod of making a memory device fault tolerant using a variable domain redundancy replacement configurationIBM·Filed 1997·Granted Mar 9, 1999·17 cites·26 claims
- 1251US6791358B2Circuit configuration with signal lines for serially transmitting a plurality of bit groupsINFINEON TECHNOLOGIES AG·Filed 2003·Granted Sep 14, 2004·1 cites·6 claims
- 1350US4965464APower amplifier circuit for integrated digital circuitsSIEMENS AG·Filed 1989·Granted Oct 23, 1990·10 cites·9 claims
- 1446US7499371B2Semiconductor memory system with a variable and settable preamble fINFINEON TECHNOLOGIES AG·Filed 2005·Granted Mar 3, 2009·1 cites·11 claims
- 1546US7009902B2Semiconductor memory having a first and second sense amplifier for sensing a memory cell voltage during a normal mode and a refresh modeINFINEON TECHNOLOGIES AG·Filed 2005·Granted Mar 7, 2006·1 cites·20 claims
- 1645US2005086424A1Well-matched echo clock in memory systemINFINEON TECHNOLOGIES AG·Filed 2003·Application pending·0 cites
- 1744US8635393B2Semiconductor memory having a short effective word line cycle time and method for reading data from a semiconductor memory of this typeDORTU JEAN-MARC·Filed 2006·Granted Jan 21, 2014·2 cites·10 claims
- 1843US6922764B2Memory, processor system and method for performing write operations on a memory regionINFINEON TECHNOLOGIES AG·Filed 2002·Granted Jul 26, 2005·4 cites·12 claims
- 1937US6646908B2Integrated memory chip with a dynamic memoryINFINEON TECHNOLOGIES AG·Filed 2002·Granted Nov 11, 2003·2 cites·4 claims
- 2037US6628553B2Data output interface, in particular for semiconductor memoriesINFINEON TECHNOLOGIES AG·Filed 2002·Granted Sep 30, 2003·2 cites·7 claims
- 2133US7092300B2Memory apparatus having a short word line cycle time and method for operating a memory apparatusINFINEON TECHNOLOGIES AG·Filed 2004·Granted Aug 15, 2006·0 cites·17 claims
- 2233US2005195977A1Semiconductor memory apparatusFiled 2005·Application pending·0 cites
- 2330US6707705B2Integrated dynamic memory device and method for operating an integrated dynamic memoryINFINEON TECHNOLOGIES AG·Filed 2002·Granted Mar 16, 2004·0 cites·5 claims
- 2430US4958319AAddress amplifier circuit having automatic interlock and protection against multiple addressing for use in static GaAs RAMsSIEMENS AG·Filed 1989·Granted Sep 18, 1990·3 cites·2 claims
- 2530US2002199139A1Test configuration for a parallel functional testing of semiconductor memory modules and test methodFiled 2002·Application pending·0 cites
- 2628US2006056255A1Semiconductor memory apparatus and method for operating a semiconductor memory apparatusDORTU JEAN-MARC·Filed 2005·Application pending·0 cites
- 2727US2005281128A1Semiconductor memory apparatus and method for operating a semiconductor memory apparatusDORTU JEAN-MARC·Filed 2004·Application pending·0 cites
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →