Inventor · disambiguated record
Venkatesh P. Gopinath
Also filed as: GOPINATH VENKATESH · GOPINATH VENKATESH P · GOPINATH VENKATESH PERIYAPATNA
53 granted patents·4 pending applications·387 citations·filing 2000–2024
98Inventor score
Files withGLOBALFOUNDRIES US INC21LSI LOGIC CORP13ADESTO TECHNOLOGIES CORP12ADESTO TECH CORP3KAMALANATHAN DEEPAK2
Top patents by PatentIndex Score
57 records- 0193US8941089B2Resistive switching devices and methods of formation thereofADESTO TECHNOLOGIES CORP·Filed 2013·Granted Jan 27, 2015·18 cites·15 claims
- 0291US12159685B2Partitioned memory architecture and method for repeatedly using the architecture for multiple in-memory processing layersGLOBALFOUNDRIES US INC·Filed 2022·Granted Dec 3, 2024·2 cites·20 claims
- 0391US12136468B2Calibration methods and structures for partitioned memory architecture with single resistor or dual resistor memory elementsGLOBALFOUNDRIES US INC·Filed 2022·Granted Nov 5, 2024·2 cites·20 claims
- 0491US12125530B2Partitioned memory architecture with single resistor or dual resistor memory elements for in-memory pipeline processingGLOBALFOUNDRIES US INC·Filed 2022·Granted Oct 22, 2024·2 cites·20 claims
- 0591US12106804B2Partitioned memory architecture with dual resistor memory elements for in-memory serial processingGLOBALFOUNDRIES US INC·Filed 2022·Granted Oct 1, 2024·2 cites·20 claims
- 0691US6864152B1Fabrication of trenches with multiple depths on the same substrateLSI LOGIC CORP·Filed 2003·Granted Mar 8, 2005·94 cites·10 claims
- 0791US6614283B1Voltage level shifterLSI LOGIC CORP·Filed 2002·Granted Sep 2, 2003·52 cites·22 claims
- 0890US7619294B1Shallow trench isolation structure with low trench parasitic capacitanceLSI CORP·Filed 2005·Granted Nov 17, 2009·16 cites·10 claims
- 0989US12426278B2Resistive memory elements accessed by bipolar junction transistorsGLOBALFOUNDRIES US INC·Filed 2022·Granted Sep 23, 2025·1 cites·20 claims
- 1087US12283952B2Voltage level shifter with multi-step programmable high supply voltage and high supply voltage-dependent variable low supply and gate bias voltagesGLOBALFOUNDRIES US INC·Filed 2023·Granted Apr 22, 2025·2 cites·20 claims
- 1186US11855642B1Programmable delay circuit including threshold-voltage programmable field effect transistorGLOBALFOUNDRIES US INC·Filed 2022·Granted Dec 26, 2023·1 cites·20 claims
- 1284US9524777B1Dual program state cycling algorithms for resistive switching memory deviceADESTO TECH CORP·Filed 2016·Granted Dec 20, 2016·7 cites·20 claims
- 1383US9025396B1Pre-conditioning circuits and methods for programmable impedance elements in memory devicesADESTO TECHNOLOGIES CORP·Filed 2013·Granted May 5, 2015·8 cites·28 claims
- 1483US8730752B1Circuits and methods for placing programmable impedance memory elements in high impedance statesKAMALANATHAN DEEPAK·Filed 2012·Granted May 20, 2014·8 cites·23 claims
- 1581US7802217B1Leakage power optimization considering gate input activity and timing slackORACLE AMERICA INC·Filed 2008·Granted Sep 21, 2010·12 cites·20 claims
- 1680US10777268B2Static random access memories with programmable impedance elements and methods and devices including the sameADESTO TECHNOLOGIES CORP·Filed 2018·Granted Sep 15, 2020·5 cites·20 claims
- 1778US6734081B1Shallow trench isolation structure for laser thermal processingLSI LOGIC CORP·Filed 2001·Granted May 11, 2004·21 cites·17 claims
- 1877US9472272B2Resistive switching memory with cell access by analog signal controlled transmission gateADESTO TECH CORP·Filed 2015·Granted Oct 18, 2016·5 cites·16 claims
- 1975US9007808B1Safeguarding data through an SMT processADESTO TECHNOLOGIES CORP·Filed 2012·Granted Apr 14, 2015·5 cites·20 claims
- 2074US10984861B1Reference circuits and methods for resistive memoriesADESTO TECHNOLOGIES CORP·Filed 2018·Granted Apr 20, 2021·3 cites·11 claims
- 2174US6566244B1Process for improving mechanical strength of layers of low k dielectric materialLSI LOGIC CORP·Filed 2002·Granted May 20, 2003·20 cites·14 claims
- 2273US12190930B2Threshold voltage-programmable field effect transistor-based memory cells and look-up table implemented using the memory cellsGLOBALFOUNDRIES US INC·Filed 2024·Granted Jan 7, 2025·0 cites·20 claims
- 2371US9530495B1Resistive switching memory having a resistor, diode, and switch memory cellADESTO TECH CORP·Filed 2015·Granted Dec 27, 2016·3 cites·20 claims
- 2470US9391270B1Memory cells with vertically integrated tunnel access device and programmable impedance elementADESTO TECHNOLOGIES CORP·Filed 2014·Granted Jul 12, 2016·2 cites·19 claims
- 2569US8021955B1Method characterizing materials for a trench isolation structure having low trench parasitic capacitanceLSI LOGIC CORP·Filed 2009·Granted Sep 20, 2011·3 cites·21 claims
- 2668US7189628B1Fabrication of trenches with multiple depths on the same substrateLSI LOGIC CORP·Filed 2004·Granted Mar 13, 2007·15 cites·7 claims
- 2768US6544829B1Polysilicon gate salicidationLSI LOGIC CORP·Filed 2002·Granted Apr 8, 2003·15 cites·20 claims
- 2867US9368206B1Capacitor arrangements using a resistive switching memory cell structureADESTO TECHNOLOGIES CORP·Filed 2014·Granted Jun 14, 2016·3 cites·16 claims
- 2967US9305643B2Solid electrolyte based memory devices and methods having adaptable read threshold levelsADESTO TECHNOLOGIES CORP·Filed 2013·Granted Apr 5, 2016·3 cites·20 claims
- 3067US7001823B1Method of manufacturing a shallow trench isolation structure with low trench parasitic capacitanceLSI LOGIC CORP·Filed 2001·Granted Feb 21, 2006·11 cites·27 claims
- 3166US12407350B2Voltage level shifter with programmable high supply voltage and high supply voltage-dependent variable low supply voltageGLOBALFOUNDRIES US INC·Filed 2023·Granted Sep 2, 2025·0 cites·20 claims
- 3266US11990171B2Threshold voltage-programmable field effect transistor-based memory cells and look-up table implemented using the memory cellsGLOBALFOUNDRIES US INC·Filed 2022·Granted May 21, 2024·0 cites·11 claims
- 3366US7026217B1Method of forming an antifuse on a semiconductor substrate using wet oxidation of a nitrided substrateLSI LOGIC CORP·Filed 2003·Granted Apr 11, 2006·15 cites·10 claims
- 3464US11056646B2Memory device having programmable impedance elements with a common conductor formed below bit linesADESTO TECHNOLOGIES CORP·Filed 2016·Granted Jul 6, 2021·1 cites·17 claims
- 3562US12176023B2Non-volatile static random access memory bit cells with ferroelectric field-effect transistorsGLOBALFOUNDRIES US INC·Filed 2022·Granted Dec 24, 2024·0 cites·20 claims
- 3661US12471294B2Array arrangements of vertical bipolar junction transistorsGLOBALFOUNDRIES US INC·Filed 2022·Granted Nov 11, 2025·0 cites·20 claims
- 3761US12432936B2Capacitor integrated with memory element of memory cellGLOBALFOUNDRIES US INC·Filed 2022·Granted Sep 30, 2025·0 cites·19 claims
- 3861US12386379B2Non-volatile current mirror circuit with programmable transistorGLOBALFOUNDRIES US INC·Filed 2023·Granted Aug 12, 2025·0 cites·17 claims
- 3960US12464745B2Bipolar junction transistor arraysGLOBALFOUNDRIES US INC·Filed 2022·Granted Nov 4, 2025·0 cites·20 claims
- 4060US12211585B2Partitioned memory architecture with single resistor memory elements for in-memory serial processingGLOBALFOUNDRIES US INC·Filed 2022·Granted Jan 28, 2025·0 cites·20 claims
- 4160US6586814B1Etch resistant shallow trench isolation in a semiconductor waferLSI LOGIC CORP·Filed 2000·Granted Jul 1, 2003·11 cites·11 claims
- 4259US12027226B2Structure including a cross-bar router and methodGLOBALFOUNDRIES US INC·Filed 2022·Granted Jul 2, 2024·0 cites·20 claims
- 4358US6569739B1Method of reducing the effect of implantation damage to shallow trench isolation regions during the formation of variable thickness gate layersLSI LOGIC CORP·Filed 2002·Granted May 27, 2003·6 cites·25 claims
- 4456US6812158B1Modular growth of multiple gate oxidesLSI LOGIC CORP·Filed 2002·Granted Nov 2, 2004·5 cites·17 claims
- 4555US7679978B1Scheme for screening weak memory cellSUN MICROSYSTEMS INC·Filed 2007·Granted Mar 16, 2010·4 cites·15 claims
- 4654US2024258320A1Structure with isolated wellGLOBALFOUNDRIES US INC·Filed 2023·Application pending·0 cites
- 4752US9818939B2Resistive switching devices having a switching layer and an intermediate electrode layer and methods of formation thereofADESTO TECHNOLOGIES CORP·Filed 2016·Granted Nov 14, 2017·0 cites·27 claims
- 4852US2014293676A1Programmable impedance memory elements and corresponding methodsADESTO TECHNOLOGIES CORP·Filed 2014·Application pending·0 cites
- 4950US6989331B2Hard mask removalLSI LOGIC CORP·Filed 2003·Granted Jan 24, 2006·4 cites·20 claims
- 5048US12376315B2Resistive memory element arrays with shared electrode stripsGLOBALFOUNDRIES US INC·Filed 2022·Granted Jul 29, 2025·0 cites·20 claims
Showing the top 50 of 57 patent records by PatentIndex Score.
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →