Inventor · disambiguated record
Robert H. Dennard
Also filed as: DENNARD ROBERT H · DENNARD ROBERT HEATH
97 granted patents·10 pending applications·2,796 citations·filing 1974–2019
99Inventor score
Top patents by PatentIndex Score
107 records- 0199US7030481B2High density chip carrier with integrated passive devicesIBM·Filed 2002·Granted Apr 18, 2006·401 cites·52 claims
- 0299US6962872B2High density chip carrier with integrated passive devicesIBM·Filed 2004·Granted Nov 8, 2005·363 cites·29 claims
- 0398US8236661B2Self-aligned well implant for improving short channel effects control, parasitic capacitance, and junction leakageDENNARD ROBERT H·Filed 2009·Granted Aug 7, 2012·134 cites·6 claims
- 0498US7358166B2Relaxed, low-defect SGOI for strained Si CMOS applicationsIBM·Filed 2005·Granted Apr 15, 2008·62 cites·23 claims
- 0598US7089515B2Threshold voltage roll-off compensation using back-gated MOSFET devices for system high-performance and low standby powerIBM·Filed 2004·Granted Aug 8, 2006·135 cites·13 claims
- 0697US8276002B2Power delivery in a heterogeneous 3-D stacked apparatusDENNARD ROBERT H·Filed 2009·Granted Sep 25, 2012·46 cites·13 claims
- 0795US9466492B2Method of lateral oxidation of NFET and PFET high-K gate stacksIBM·Filed 2015·Granted Oct 11, 2016·9 cites·11 claims
- 0895US8174288B2Voltage conversion and integrated circuits with stacked voltage domainsDENNARD ROBERT H·Filed 2009·Granted May 8, 2012·31 cites·17 claims
- 0995US5206544ACMOS off-chip driver with reduced signal swing and reduced power supply disturbanceIBM·Filed 1991·Granted Apr 27, 1993·91 cites·18 claims
- 1094US8552500B2Structure for CMOS ETSOI with multiple threshold voltages and active well bias capabilityDENNARD ROBERT H·Filed 2011·Granted Oct 8, 2013·18 cites·19 claims
- 1194US8415743B2ETSOI CMOS with back gatesCAI JIN·Filed 2011·Granted Apr 9, 2013·17 cites·11 claims
- 1293US9627378B2Methods of forming FINFETs with locally thinned channels from fins having in-situ doped epitaxial claddingIBM·Filed 2015·Granted Apr 18, 2017·7 cites·15 claims
- 1393US7106620B2Memory cell having improved read stabilityIBM·Filed 2005·Granted Sep 12, 2006·32 cites·21 claims
- 1492US8815684B2Bulk finFET with super steep retrograde wellIBM·Filed 2012·Granted Aug 26, 2014·12 cites·25 claims
- 1592US8754672B2Voltage conversion and integrated circuits with stacked voltage domainsDENNARD ROBERT H·Filed 2012·Granted Jun 17, 2014·10 cites·6 claims
- 1692US8531001B2Complementary bipolar inverterCAI JIN·Filed 2011·Granted Sep 10, 2013·13 cites·20 claims
- 1792US8530287B2ETSOI CMOS with back gatesCAI JIN·Filed 2012·Granted Sep 10, 2013·13 cites·9 claims
- 1892US8473762B2Power delivery in a heterogeneous 3-D stacked apparatusDENNARD ROBERT H·Filed 2012·Granted Jun 25, 2013·13 cites·5 claims
- 1992US8293615B2Self-aligned dual depth isolation and method of fabricationCHENG KANGGUO·Filed 2011·Granted Oct 23, 2012·11 cites·15 claims
- 2091US7099216B2Single cycle read/write/writeback pipeline, full-wordline I/O DRAM architecture with enhanced write and single ended sensingIBM·Filed 2003·Granted Aug 29, 2006·56 cites·8 claims
- 2191US5540785AFabrication of defect free silicon on an insulating substrateIBM·Filed 1994·Granted Jul 30, 1996·106 cites·9 claims
- 2291US5378943ALow power interface circuitIBM·Filed 1993·Granted Jan 3, 1995·61 cites·13 claims
- 2390US7417288B2Substrate solution for back gate controlled SRAM with coexisting logic devicesIBM·Filed 2005·Granted Aug 26, 2008·13 cites·1 claims
- 2489US7018873B2Method of making a device threshold control of front-gate silicon-on-insulator MOSFET using a self-aligned back-gateIBM·Filed 2003·Granted Mar 28, 2006·46 cites·19 claims
- 2588US6812527B2Method to control device threshold of SOI MOSFET'sIBM·Filed 2002·Granted Nov 2, 2004·37 cites·9 claims
- 2688US6664598B1Polysilicon back-gated SOI MOSFET for dynamic threshold voltage controlIBM·Filed 2002·Granted Dec 16, 2003·40 cites·9 claims
- 2788US6426905B1High speed DRAM local bit line sense amplifierIBM·Filed 2001·Granted Jul 30, 2002·50 cites·15 claims
- 2888US5198995ATrench-capacitor-one-transistor storage cell and array for dynamic random access memoriesIBM·Filed 1990·Granted Mar 30, 1993·71 cites·8 claims
- 2987US8629705B2Low voltage signalingCHANG LELAND·Filed 2010·Granted Jan 14, 2014·9 cites·21 claims
- 3087US7273785B2Method to control device threshold of SOI MOSFET'sIBM·Filed 2004·Granted Sep 25, 2007·34 cites·8 claims
- 3187US6982897B2Nondestructive read, two-switch, single-charge-storage device RAM devicesIBM·Filed 2003·Granted Jan 3, 2006·31 cites·18 claims
- 3287US5462883AMethod of fabricating defect-free silicon on an insulating substrateIBM·Filed 1994·Granted Oct 31, 1995·81 cites·32 claims
- 3386US10121786B2FinFET with U-shaped channel and S/D epitaxial cladding extending under gate spacersIBM·Filed 2017·Granted Nov 6, 2018·3 cites·5 claims
- 3486US3949381ADifferential charge transfer sense amplifierIBM·Filed 1974·Granted Apr 6, 1976·35 cites·7 claims
- 3585US7242629B2High speed latch circuits using gated diodesIBM·Filed 2006·Granted Jul 10, 2007·14 cites·15 claims
- 3685US6426914B1Floating wordline using a dynamic row decoder and bitline VDD prechargeIBM·Filed 2001·Granted Jul 30, 2002·37 cites·20 claims
- 3785US5986472AVoltage level translation for an output driver system with a bias generatorIBM·Filed 1997·Granted Nov 16, 1999·50 cites·14 claims
- 3884US7767546B1Low cost fabrication of double box back gate silicon-on-insulator wafers with built-in shallow trench isolation in back gate layerIBM·Filed 2009·Granted Aug 3, 2010·12 cites·22 claims
- 3984US5867010ACircuit and method for voltage level translation utilizing a bias generatorIBM·Filed 1997·Granted Feb 2, 1999·42 cites·20 claims
- 4084US5811993ASupply voltage independent bandgap based reference generator circuit for SOI/bulk CMOS technologiesIBM·Filed 1996·Granted Sep 22, 1998·45 cites·13 claims
- 4184US4160987AField effect transistors with polycrystalline silicon gate self-aligned to both conductive and non-conductive regions and fabrication of integrated circuits containing the transistorsIBM·Filed 1977·Granted Jul 10, 1979·29 cites·44 claims
- 4283US8248152B2Switched capacitor voltage convertersDENNARD ROBERT H·Filed 2009·Granted Aug 21, 2012·12 cites·9 claims
- 4382US7027326B23T1D memory cells using gated diodes and methods of use thereofIBM·Filed 2004·Granted Apr 11, 2006·30 cites·42 claims
- 4482US6815296B2Polysilicon back-gated SOI MOSFET for dynamic threshold voltage controlIBM·Filed 2003·Granted Nov 9, 2004·28 cites·8 claims
- 4581US7116594B2Sense amplifier circuits and high speed latch circuits using gated diodesIBM·Filed 2004·Granted Oct 3, 2006·23 cites·18 claims
- 4681US6946373B2Relaxed, low-defect SGOI for strained Si CMOS applicationsIBM·Filed 2002·Granted Sep 20, 2005·24 cites·22 claims
- 4780US7838942B2Substrate solution for back gate controlled SRAM with coexisting logic devicesIBM·Filed 2008·Granted Nov 23, 2010·5 cites·20 claims
- 4880US7385251B2Area-efficient gated diode structure and method of forming sameIBM·Filed 2006·Granted Jun 10, 2008·7 cites·1 claims
- 4980US6518827B1Sense amplifier threshold compensationIBM·Filed 2001·Granted Feb 11, 2003·31 cites·42 claims
- 5079US8587063B2Hybrid double box back gate silicon-on-insulator wafers with enhanced mobility channelsDENNARD ROBERT H·Filed 2009·Granted Nov 19, 2013·8 cites·24 claims
Showing the top 50 of 107 patent records by PatentIndex Score.
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