Inventor · disambiguated record
James B. Eifert
Also filed as: EIFERT JAMES B · EIFERT JAMES BRADLEY
22 granted patents·469 citations·filing 1989–2014
96Inventor score
Top patents by PatentIndex Score
22 records- 0187US8386747B2Processor and method for dynamic and selective alteration of address translationFREESCALE SEMICONDUCTOR INC·Filed 2009·Granted Feb 26, 2013·17 cites·20 claims
- 0280US5448744AIntegrated circuit microprocessor with programmable chip select logicMOTOROLA INC·Filed 1989·Granted Sep 5, 1995·69 cites·36 claims
- 0378US8717829B2System and method for soft error detection in memory devicesSHARMA ASHISH·Filed 2012·Granted May 6, 2014·7 cites·19 claims
- 0474US5617559AModular chip select control circuit and method for performing pipelined memory accessesMOTOROLA INC·Filed 1994·Granted Apr 1, 1997·55 cites·28 claims
- 0572US6499092B1Method and apparatus for performing access censorship in a data processing systemMOTOROLA INC·Filed 2000·Granted Dec 24, 2002·15 cites·12 claims
- 0666US8380918B2Non-volatile storage alteration trackingFREESCALE SEMICONDUCTOR INC·Filed 2010·Granted Feb 19, 2013·2 cites·17 claims
- 0763US7809980B2Error detector in a cache memory using configurable way redundancyREFAELI JEHODA·Filed 2007·Granted Oct 5, 2010·4 cites·20 claims
- 0863US5072365ADirect memory access controller using prioritized interrupts for varying bus mastershipMOTOROLA INC·Filed 1989·Granted Dec 10, 1991·30 cites·8 claims
- 0959US5511182AProgrammable pin configuration logic circuit for providing a chip select signal and related methodMOTOROLA INC·Filed 1994·Granted Apr 23, 1996·40 cites·14 claims
- 1057US5699516AMethod and apparatus for implementing a in-order termination bus protocol within a data processing systemMOTOROLA INC·Filed 1994·Granted Dec 16, 1997·32 cites·15 claims
- 1155US5651138AData processor with controlled burst memory accesses and method thereforMOTOROLA INC·Filed 1994·Granted Jul 22, 1997·28 cites·24 claims
- 1255US5276824AData processor having a multi-stage instruction pipe and selection logic responsive to an instruction decoder for selecting one stage of the instruction pipeMOTOROLA INC·Filed 1993·Granted Jan 4, 1994·30 cites·3 claims
- 1354US5727172AMethod and apparatus for performing atomic accesses in a data processing systemMOTOROLA INC·Filed 1995·Granted Mar 10, 1998·32 cites·31 claims
- 1447US9891277B2Secure low voltage testingFREESCALE SEMICONDUCTOR INC·Filed 2014·Granted Feb 13, 2018·0 cites·18 claims
- 1545US6079015AData processing system having selectable exception table relocation and method thereforMOTOROLA INC·Filed 1998·Granted Jun 20, 2000·21 cites·17 claims
- 1643US5241637AData processor microsequencer having multiple microaddress sources and next microaddress source selectionMOTOROLA INC·Filed 1993·Granted Aug 31, 1993·16 cites·2 claims
- 1742US6240493B1Method and apparatus for performing access censorship in a data processing systemMOTOROLA INC·Filed 1998·Granted May 29, 2001·16 cites·8 claims
- 1842US6052746AIntegrated circuit having programmable pull device configured to enable/disable first function in favor of second function according to predetermined scheme before/after resetMOTOROLA INC·Filed 1998·Granted Apr 18, 2000·15 cites·23 claims
- 1942US5675749AMethod and apparatus for controlling show cycles in a data processing systemMOTOROLA INC·Filed 1995·Granted Oct 7, 1997·15 cites·19 claims
- 2037US5737566AData processing system having a memory with both a high speed operating mode and a low power operating mode and method thereforMOTOROLA INC·Filed 1993·Granted Apr 7, 1998·6 cites·16 claims
- 2137US5329621AMicroprocessor which optimizes bus utilization based upon bus speedMOTOROLA INC·Filed 1989·Granted Jul 12, 1994·11 cites·3 claims
- 2235US5717931AMethod and apparatus for communicating between master and slave electronic devices where the slave device may be hazardousMOTOROLA INC·Filed 1994·Granted Feb 10, 1998·8 cites·15 claims
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →