Inventor · disambiguated record
Brian J. Hickmann
Also filed as: HICKMANN BRIAN · HICKMANN BRIAN J · HICKMANN BRIAN JOHN
27 granted patents·4 pending applications·110 citations·filing 2008–2025
96Inventor score
Top patents by PatentIndex Score
31 records- 0197US10649772B2Method and apparatus for efficient matrix transposeINTEL CORP·Filed 2018·Granted May 12, 2020·29 cites·18 claims
- 0295US9348601B2Coalescing adjacent gather/scatter operationsINTEL CORP·Filed 2012·Granted May 24, 2016·14 cites·21 claims
- 0393US9575765B2Coalescing adjacent gather/scatter operationsINTEL CORP·Filed 2015·Granted Feb 21, 2017·6 cites·11 claims
- 0490US9632792B2Coalescing adjacent gather/scatter operationsINTEL CORP·Filed 2015·Granted Apr 25, 2017·4 cites·10 claims
- 0590US9626192B2Coalescing adjacent gather/scatter operationsINTEL CORP·Filed 2015·Granted Apr 18, 2017·4 cites·24 claims
- 0688US9658856B2Coalescing adjacent gather/scatter operationsINTEL CORP·Filed 2015·Granted May 23, 2017·3 cites·9 claims
- 0788US9645826B2Coalescing adjacent gather/scatter operationsINTEL CORP·Filed 2015·Granted May 9, 2017·3 cites·10 claims
- 0888US9626193B2Coalescing adjacent gather/scatter operationsINTEL CORP·Filed 2015·Granted Apr 18, 2017·3 cites·6 claims
- 0988US9612842B2Coalescing adjacent gather/scatter operationsINTEL CORP·Filed 2015·Granted Apr 4, 2017·3 cites·22 claims
- 1088US9563429B2Coalescing adjacent gather/scatter operationsINTEL CORP·Filed 2015·Granted Feb 7, 2017·3 cites·5 claims
- 1187US10133577B2Vector mask driven clock gating for power efficiency of a processorINTEL CORP·Filed 2012·Granted Nov 20, 2018·8 cites·24 claims
- 1286US10268539B2Apparatus and method for multi-bit error detection and correctionINTEL CORP·Filed 2015·Granted Apr 23, 2019·7 cites·25 claims
- 1382US12360774B2Coalescing adjacent gather/scatter operationsINTEL CORP·Filed 2022·Granted Jul 15, 2025·0 cites·20 claims
- 1482US12254061B2Apparatuses and methods to accelerate matrix multiplicationINTEL CORP·Filed 2018·Granted Mar 18, 2025·3 cites·25 claims
- 1576US11599362B2Coalescing adjacent gather/scatter operationsINTEL CORP·Filed 2021·Granted Mar 7, 2023·0 cites·27 claims
- 1676US9152382B2Reducing power consumption in a fused multiply-add (FMA) unit responsive to input data valuesINTEL CORP·Filed 2012·Granted Oct 6, 2015·3 cites·23 claims
- 1774US9323500B2Reducing power consumption in a fused multiply-add (FMA) unit responsive to input data valuesHICKMANN BRIAN·Filed 2013·Granted Apr 26, 2016·5 cites·16 claims
- 1873US9639355B2Functional unit capable of executing approximations of functionsINTEL CORP·Filed 2014·Granted May 2, 2017·3 cites·21 claims
- 1971US11003455B2Coalescing adjacent gather/scatter operationsINTEL CORP·Filed 2019·Granted May 11, 2021·0 cites·8 claims
- 2069US9654143B2Consecutive bit error detection and correctionINTEL CORP·Filed 2014·Granted May 16, 2017·4 cites·15 claims
- 2167US2025232002A1Apparatuses and methods to accelerate matrix multiplicationINTEL CORP·Filed 2025·Application pending·0 cites
- 2266US10275257B2Coalescing adjacent gather/scatter operationsINTEL CORP·Filed 2017·Granted Apr 30, 2019·0 cites·14 claims
- 2359US8577952B2Combined binary/decimal fixed-point multiplier and methodERLE MARK ALAN·Filed 2008·Granted Nov 5, 2013·2 cites·10 claims
- 2459US8417761B2Direct decimal number tripling in binary coded addersERLE MARK ALAN·Filed 2008·Granted Apr 9, 2013·2 cites·20 claims
- 2557US2020097290A1Method and apparatus for performing a vector permute with an index and an immediateINTEL CORP·Filed 2019·Application pending·0 cites
- 2654US8676871B2Functional unit capable of executing approximations of functionsPINEIRO ALEX·Filed 2010·Granted Mar 18, 2014·1 cites·16 claims
- 2750US11520562B2System to perform unary functions using range-specific coefficient setsINTEL CORP·Filed 2019·Granted Dec 6, 2022·0 cites·19 claims
- 2847US2016188341A1Apparatus and method for fused add-add instructionsOULD-AHMED-VALL ELMOUSTAPHA·Filed 2014·Application pending·0 cites
- 2947US2016188327A1Apparatus and method for fused multiply-multiply instructionsOULD-AHMED-VALL ELMOUSTAPHA·Filed 2014·Application pending·0 cites
- 3043US11169776B2Decomposed floating point multiplicationINTEL CORP·Filed 2019·Granted Nov 9, 2021·0 cites·21 claims
- 3138US9141586B2Method, apparatus, system for single-path floating-point rounding flow that supports generation of normals/denormals and associated status flagsFERGUSON WARREN E·Filed 2012·Granted Sep 22, 2015·0 cites·20 claims
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