Inventor · disambiguated record
Hai Li
Also filed as: LI HAI · LI HAI HELEN
75 granted patents·7 pending applications·636 citations·filing 2008–2015
99Inventor score
Top patents by PatentIndex Score
82 records- 0197US7898838B2Resistive sense memory calibration for self-reference read methodSEAGATE TECHNOLOGY LLC·Filed 2009·Granted Mar 1, 2011·90 cites·24 claims
- 0295US7916515B2Non-volatile memory read/write verifySEAGATE TECHNOLOGY LLC·Filed 2009·Granted Mar 29, 2011·44 cites·20 claims
- 0394US8203899B2Memory cell with proportional current self-reference sensingCHEN YIRAN·Filed 2010·Granted Jun 19, 2012·20 cites·20 claims
- 0494US7852665B2Memory cell with proportional current self-reference sensingSEAGATE TECHNOLOGY LLC·Filed 2009·Granted Dec 14, 2010·35 cites·20 claims
- 0590US8296620B2Data devices including multiple error correction codes and methods of utilizingCHEN YIRAN·Filed 2008·Granted Oct 23, 2012·24 cites·23 claims
- 0690US8213215B2Resistive sense memory calibration for self-reference read methodCHEN YIRAN·Filed 2011·Granted Jul 3, 2012·12 cites·20 claims
- 0789US7898844B2Magnetic tunnel junction and memristor apparatusSEAGATE TECHNOLOGY LLC·Filed 2009·Granted Mar 1, 2011·13 cites·19 claims
- 0889US7826255B2Variable write and read methods for resistive random access memorySEAGATE TECHNOLOGY LLC·Filed 2008·Granted Nov 2, 2010·16 cites·7 claims
- 0989US7755965B2Temperature dependent system for reading ST-RAMSEAGATE TECHNOLOGY LLC·Filed 2008·Granted Jul 13, 2010·21 cites·17 claims
- 1088US8213216B2Shared bit line and source line resistive sense memory structureWANG XUGUANG·Filed 2011·Granted Jul 3, 2012·11 cites·20 claims
- 1187US8289746B2MRAM diode array and access methodCHEN YIRAN·Filed 2010·Granted Oct 16, 2012·9 cites·18 claims
- 1287US8199562B2Memory cell with enhanced read and write sense marginsZHU WENZHONG·Filed 2010·Granted Jun 12, 2012·10 cites·20 claims
- 1387US8116123B2Spin-transfer torque memory non-destructive self-reference read methodCHEN YIRAN·Filed 2008·Granted Feb 14, 2012·15 cites·20 claims
- 1487US8040713B2Bit set modes for a resistive sense memory cell arraySEAGATE TECHNOLOGY LLC·Filed 2009·Granted Oct 18, 2011·17 cites·20 claims
- 1587US7936588B2Memory array with read reference voltage cellsSEAGATE TECHNOLOGY LLC·Filed 2010·Granted May 3, 2011·9 cites·20 claims
- 1687US7881094B2Voltage reference generation for resistive sense memory cellsSEAGATE TECHNOLOGY LLC·Filed 2008·Granted Feb 1, 2011·20 cites·20 claims
- 1787US7855923B2Write current compensation using word line boosting circuitrySEAGATE TECHNOLOGY LLC·Filed 2009·Granted Dec 21, 2010·13 cites·20 claims
- 1886US8116122B2Spin-transfer torque memory self-reference read methodLI HAI·Filed 2008·Granted Feb 14, 2012·13 cites·20 claims
- 1986US7830726B2Data storage using read-mask-write operationSEAGATE TECHNOLOGY LLC·Filed 2008·Granted Nov 9, 2010·13 cites·20 claims
- 2086US7755923B2Memory array with read reference voltage cellsSEAGATE TECHNOLOGY LLC·Filed 2008·Granted Jul 13, 2010·14 cites·21 claims
- 2185US9128821B2Data updating in non-volatile memoryCHEN YIRAN·Filed 2009·Granted Sep 8, 2015·12 cites·5 claims
- 2285US8514605B2MRAM diode array and access methodCHEN YIRAN·Filed 2012·Granted Aug 20, 2013·7 cites·20 claims
- 2384US7852660B2Enhancing read and write sense margins in a resistive sense elementSEAGATE TECHNOLOGY LLC·Filed 2009·Granted Dec 14, 2010·12 cites·20 claims
- 2483US7936622B2Defective bit scheme for multi-layer integrated memory deviceSEAGATE TECHNOLOGY LLC·Filed 2009·Granted May 3, 2011·14 cites·20 claims
- 2580US8009457B2Write current compensation using word line boosting circuitrySEAGATE TECHNOLOGY LLC·Filed 2010·Granted Aug 30, 2011·5 cites·20 claims
- 2679US8416614B2Spin-transfer torque memory non-destructive self-reference read methodCHEN YIRAN·Filed 2012·Granted Apr 9, 2013·5 cites·18 claims
- 2779US8081504B2Computer memory device with status registerCHEN YIRAN·Filed 2008·Granted Dec 20, 2011·11 cites·20 claims
- 2879US8040743B2Data storage using read-mask-write operationSEAGATE TECHNOLOGY LLC·Filed 2010·Granted Oct 18, 2011·5 cites·20 claims
- 2979US7830700B2Resistive sense memory array with partial block update capabilitySEAGATE TECHNOLOGY LLC·Filed 2008·Granted Nov 9, 2010·9 cites·20 claims
- 3078US8199563B2Transmission gate-based spin-transfer torque memory unitCHEN YIRAN·Filed 2011·Granted Jun 12, 2012·7 cites·20 claims
- 3178US8054678B2Stuck-at defect condition repair for a non-volatile memory cellSEAGATE TECHNOLOGY LLC·Filed 2010·Granted Nov 8, 2011·5 cites·20 claims
- 3278US7859891B2Static source plane in stramSEAGATE TECHNOLOGY LLC·Filed 2008·Granted Dec 28, 2010·8 cites·6 claims
- 3376US8203893B2Write current compensation using word line boosting circuitryLI HAI·Filed 2011·Granted Jun 19, 2012·4 cites·20 claims
- 3476US7974121B2Write current compensation using word line boosting circuitrySEAGATE TECHNOLOGY LLC·Filed 2010·Granted Jul 5, 2011·4 cites·20 claims
- 3576US7952917B2Variable write and read methods for resistive random access memorySEAGATE TECHNOLOGY LLC·Filed 2010·Granted May 31, 2011·4 cites·18 claims
- 3675US8966181B2Memory hierarchy with non-volatile filter and victim cachesCHEN YIRAN·Filed 2008·Granted Feb 24, 2015·7 cites·19 claims
- 3775US8059453B2Magnetic tunnel junction and memristor apparatusWANG XIAOBIN·Filed 2011·Granted Nov 15, 2011·4 cites·20 claims
- 3874US8416615B2Transmission gate-based spin-transfer torque memory unitCHEN YIRAN·Filed 2012·Granted Apr 9, 2013·5 cites·20 claims
- 3974US8391055B2Magnetic tunnel junction and memristor apparatusWANG XIAOBIN·Filed 2011·Granted Mar 5, 2013·2 cites·18 claims
- 4073US8054673B2Three dimensionally stacked non volatile memory unitsSEAGATE TECHNOLOGY LLC·Filed 2009·Granted Nov 8, 2011·7 cites·14 claims
- 4172US7944730B2Write method with voltage line tuningSEAGATE TECHNOLOGY LLC·Filed 2009·Granted May 17, 2011·9 cites·18 claims
- 4270US8289786B2Data storage using read-mask-write operationHUANG HENRY F·Filed 2011·Granted Oct 16, 2012·4 cites·20 claims
- 4370US8098513B2Memory array with read reference voltage cellsLIU HONGYUE·Filed 2011·Granted Jan 17, 2012·4 cites·20 claims
- 4470US8054675B2Variable write and read methods for resistive random access memorySEAGATE TECHNOLOGY LLC·Filed 2011·Granted Nov 8, 2011·3 cites·15 claims
- 4569US7974119B2Transmission gate-based spin-transfer torque memory unitSEAGATE TECHNOLOGY LLC·Filed 2008·Granted Jul 5, 2011·5 cites·20 claims
- 4669US7894250B2Stuck-at defect condition repair for a non-volatile memory cellSEAGATE TECHNOLOGY LLC·Filed 2009·Granted Feb 22, 2011·5 cites·19 claims
- 4768US7944731B2Resistive sense memory array with partial block update capabilitySEAGATE TECHNOLOGY LLC·Filed 2010·Granted May 17, 2011·3 cites·20 claims
- 4867US8526252B2Quiescent testing of non-volatile memory arrayLI HAI·Filed 2009·Granted Sep 3, 2013·6 cites·17 claims
- 4965US8154914B2Predictive thermal preconditioning and timing control for non-volatile memory cellsCHEN YIRAN·Filed 2011·Granted Apr 10, 2012·2 cites·20 claims
- 5065US8139397B2Spatial correlation of reference cells in resistive memory arrayCHEN YIRAN·Filed 2010·Granted Mar 20, 2012·2 cites·20 claims
Showing the top 50 of 82 patent records by PatentIndex Score.
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →