Inventor · disambiguated record
Artur Balasinski
Also filed as: BALASINSKI ARTUR · BALASINSKI ARTUR E
2 granted patents·34 citations·filing 2000–2004
63Inventor score
Files withCYPRESS SEMICONDUCTOR CORP2
Top patents by PatentIndex Score
2 records- 0170US6834262B1Scheme for improving the simulation accuracy of integrated circuit patterns by simulation of the maskCYPRESS SEMICONDUCTOR CORP·Filed 2000·Granted Dec 21, 2004·16 cites·11 claims
- 0267US7197737B1Techniques for placing dummy features in an integrated circuit based on dielectric pattern densityCYPRESS SEMICONDUCTOR CORP·Filed 2004·Granted Mar 27, 2007·18 cites·17 claims
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →