Inventor · disambiguated record
Muthumanickam Sankarapandian
Also filed as: SANKARAPANDIAN MUTHUMANICKAM
77 granted patents·15 pending applications·570 citations·filing 2002–2024
99Inventor score
Top patents by PatentIndex Score
92 records- 0199US10074575B1Integrating and isolating nFET and pFET nanosheet transistors on a substrateIBM·Filed 2017·Granted Sep 11, 2018·45 cites·19 claims
- 0299US7855101B2Layer transfer process and functionally enhanced integrated circuits produced therebyIBM·Filed 2009·Granted Dec 21, 2010·102 cites·14 claims
- 0396US11171051B1Contacts and liners having multi-segmented protective capsIBM·Filed 2020·Granted Nov 9, 2021·9 cites·20 claims
- 0496US6911400B2Nonlithographic method to produce self-aligned mask, articles produced by same and compositions for sameIBM·Filed 2002·Granted Jun 28, 2005·79 cites·49 claims
- 0595US11456415B2Phase change memory cell with a wrap around and ring type of electrode contact and a projection linerIBM·Filed 2020·Granted Sep 27, 2022·4 cites·20 claims
- 0695US8927442B1SiCOH hardmask with graded transition layersIBM·Filed 2013·Granted Jan 6, 2015·33 cites·10 claims
- 0795US8916337B2Dual hard mask lithography processARNOLD JOHN C·Filed 2012·Granted Dec 23, 2014·21 cites·25 claims
- 0894US11930724B2Phase change memory cell spacerIBM·Filed 2021·Granted Mar 12, 2024·2 cites·13 claims
- 0994US10256320B1Vertical field-effect-transistors having a silicon oxide layer with controlled thicknessIBM·Filed 2017·Granted Apr 9, 2019·11 cites·20 claims
- 1094US10242920B2Integrating and isolating NFET and PFET nanosheet transistors on a substrateIBM·Filed 2018·Granted Mar 26, 2019·7 cites·20 claims
- 1194US9287130B1Method for single fin cuts using selective ion implantsGLOBALFOUNDRIES INC·Filed 2015·Granted Mar 15, 2016·12 cites·23 claims
- 1293US8859433B2DSA grapho-epitaxy process with etch stop materialIBM·Filed 2013·Granted Oct 14, 2014·21 cites·25 claims
- 1392US10396208B2Vertical transistors with improved top source/drain junctionsIBM·Filed 2017·Granted Aug 27, 2019·6 cites·13 claims
- 1492US6641899B1Nonlithographic method to produce masks by selective reaction, articles produced, and composition for sameIBM·Filed 2002·Granted Nov 4, 2003·43 cites·11 claims
- 1591US10049876B1Removal of trilayer resist without damage to underlying structureIBM·Filed 2017·Granted Aug 14, 2018·5 cites·20 claims
- 1691US9496371B1Channel protection during fin fabricationIBM·Filed 2015·Granted Nov 15, 2016·7 cites·20 claims
- 1790US10304936B2Protection of high-K dielectric during reliability anneal on nanosheet structuresIBM·Filed 2016·Granted May 28, 2019·5 cites·12 claims
- 1889US10475904B2Methods of forming merged source/drain regions on integrated circuit productsGLOBALFOUNDRIES INC·Filed 2018·Granted Nov 12, 2019·5 cites·19 claims
- 1989US9171927B2Spacer replacement for replacement metal gate semiconductor devicesIBM·Filed 2013·Granted Oct 27, 2015·9 cites·9 claims
- 2089US8470706B2Methods to mitigate plasma damage in organosilicate dielectricsARNOLD JOHN C·Filed 2012·Granted Jun 25, 2013·8 cites·15 claims
- 2188US7459183B2Method of forming low-K interlevel dielectric layers and structuresIBM·Filed 2005·Granted Dec 2, 2008·7 cites·1 claims
- 2287US10937789B2Nanosheet eDRAMIBM·Filed 2018·Granted Mar 2, 2021·4 cites·10 claims
- 2387US10374034B1Undercut control in isotropic wet etch processesIBM·Filed 2018·Granted Aug 6, 2019·5 cites·20 claims
- 2487US7750479B2Treatment of plasma damaged layer for critical dimension retention, pore sealing and repairIBM·Filed 2007·Granted Jul 6, 2010·11 cites·19 claims
- 2586US10896816B2Silicon residue removal in nanosheet transistorsIBM·Filed 2017·Granted Jan 19, 2021·4 cites·20 claims
- 2686US10840354B2Approach to bottom dielectric isolation for vertical transport fin field effect transistorsIBM·Filed 2017·Granted Nov 17, 2020·3 cites·8 claims
- 2786US10629702B2Approach to bottom dielectric isolation for vertical transport fin field effect transistorsIBM·Filed 2018·Granted Apr 21, 2020·3 cites·9 claims
- 2885US10607922B1Controlling via critical dimension during fabrication of a semiconductor waferIBM·Filed 2018·Granted Mar 31, 2020·3 cites·14 claims
- 2985US7781332B2Methods to mitigate plasma damage in organosilicate dielectrics using a protective sidewall spacerIBM·Filed 2007·Granted Aug 24, 2010·11 cites·14 claims
- 3084US8835326B2Titanium-nitride removalFITZSIMMONS JOHN A·Filed 2012·Granted Sep 16, 2014·6 cites·22 claims
- 3184US8481423B2Methods to mitigate plasma damage in organosilicate dielectricsARNOLD JOHN C·Filed 2007·Granted Jul 9, 2013·8 cites·20 claims
- 3282US11152298B2Metal via structureIBM·Filed 2019·Granted Oct 19, 2021·3 cites·18 claims
- 3381US11302797B2Approach to bottom dielectric isolation for vertical transport fin field effect transistorsIBM·Filed 2020·Granted Apr 12, 2022·1 cites·10 claims
- 3481US10886197B2Controlling via critical dimension with a titanium nitride hard maskIBM·Filed 2020·Granted Jan 5, 2021·1 cites·19 claims
- 3581US10692985B2Protection of high-K dielectric during reliability anneal on nanosheet structuresIBM·Filed 2019·Granted Jun 23, 2020·2 cites·16 claims
- 3681US8129843B2Methods to mitigate plasma damage in organosilicate dielectrics using a protective sidewall spacerARNOLD JOHN C·Filed 2010·Granted Mar 6, 2012·5 cites·5 claims
- 3780US7948051B2Nonlithographic method to produce self-aligned mask, articles produced by same and compositions for sameIBM·Filed 2008·Granted May 24, 2011·4 cites·15 claims
- 3879US9070625B2Selective etch chemistry for gate electrode materialsIBM·Filed 2013·Granted Jun 30, 2015·3 cites·19 claims
- 3978US8491987B2Selectively coated self-aligned maskCOLBURN MATTHEW E·Filed 2008·Granted Jul 23, 2013·4 cites·6 claims
- 4077US11037822B2Svia using a single damascene interconnectIBM·Filed 2019·Granted Jun 15, 2021·2 cites·16 claims
- 4177US10658521B2Enabling residue free gap fill between nanosheetsIBM·Filed 2018·Granted May 19, 2020·1 cites·14 claims
- 4275US7830010B2Surface treatment for selective metal cap applicationsIBM·Filed 2008·Granted Nov 9, 2010·6 cites·9 claims
- 4374US10825720B2Single trench damascene interconnect using TiN HMOIBM·Filed 2018·Granted Nov 3, 2020·1 cites·18 claims
- 4473US11133308B2Uniform work function metal recess for vertical transistor complementary metal oxide semiconductor technologyIBM·Filed 2019·Granted Sep 28, 2021·1 cites·6 claims
- 4573US10256161B2Dual work function CMOS devicesIBM·Filed 2016·Granted Apr 9, 2019·2 cites·3 claims
- 4673US7396758B2Polycarbosilane buried etch stops in interconnect structuresIBM·Filed 2007·Granted Jul 8, 2008·4 cites·1 claims
- 4770US11515431B2Enabling residue free gap fill between nanosheetsIBM·Filed 2020·Granted Nov 29, 2022·0 cites·17 claims
- 4870US9831100B2Solution based etching of titanium carbide and titanium nitride structuresINTERMOLECULAR INC·Filed 2014·Granted Nov 28, 2017·2 cites·18 claims
- 4969US8119322B2Method for producing self-aligned mask, articles produced by same and composition for sameBRUNNER TIMOTHY A·Filed 2008·Granted Feb 21, 2012·3 cites·17 claims
- 5069US7378738B2Method for producing self-aligned mask, articles produced by same and composition for sameIBM·Filed 2003·Granted May 27, 2008·13 cites·10 claims
Showing the top 50 of 92 patent records by PatentIndex Score.
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