Inventor · disambiguated record
Sebastien Barnola
Also filed as: BARNOLA SEBASTIEN · BARNOLA SÉBASTIEN
17 granted patents·1 pending application·23 citations·filing 2011–2024
89Inventor score
Files withCOMMISSARIAT ENERGIE ATOMIQUE10BARNOLA SEBASTIEN1BELLEDENT JEROME1COMMISSARIAT A LENERGIE ATOMIQUE ET AUX ENE ALT1ECLYPIA1
Top patents by PatentIndex Score
18 records- 0182US10062602B2Method of etching a porous dielectric materialCOMMISSARIAT A LENERGIE ATOMIQUE ET AUX ENE ALT·Filed 2013·Granted Aug 28, 2018·5 cites·28 claims
- 0277US10573529B2Method of etching a three-dimensional dielectric layerCOMMISSARIAT ENERGIE ATOMIQUE·Filed 2018·Granted Feb 25, 2020·2 cites·19 claims
- 0374US9558957B2Method for manufacturing a substrate provided with different active areas and with planar and three-dimensional transistorsCOMMISSARIAT ENERGIE ATOMIQUE·Filed 2013·Granted Jan 31, 2017·3 cites·13 claims
- 0473US11152570B2Electronic component manufacturing methodSTMICROELECTRONICS SAS·Filed 2019·Granted Oct 19, 2021·2 cites·19 claims
- 0573US9543409B2Production of spacers at flanks of a transistor gateCOMMISSARIAT ENERGIE ATOMIQUE·Filed 2015·Granted Jan 10, 2017·2 cites·20 claims
- 0673US9156306B2Lithography method for doubled pitchPAIN LAURENT·Filed 2011·Granted Oct 13, 2015·5 cites·12 claims
- 0766US9934973B2Method for obtaining patterns in a layerCOMMISSARIAT ENERGIE ATOMIQUE·Filed 2015·Granted Apr 3, 2018·1 cites·19 claims
- 0865US10347545B2Method for producing on the same transistors substrate having different characteristicsCOMMISSARIAT ENERGIE ATOMIQUE·Filed 2017·Granted Jul 9, 2019·1 cites·21 claims
- 0962US9698250B2Method for the surface etching of a three-dimensional structureCOMMISSARIAT ENERGIE ATOMIQUE·Filed 2015·Granted Jul 4, 2017·1 cites·18 claims
- 1061US12035643B2Electronic component manufacturing methodST MICROELECTRONICS CROLLES 2 SAS·Filed 2021·Granted Jul 9, 2024·0 cites·15 claims
- 1158US12216042B2Photoacoustic detecting deviceECLYPIA·Filed 2024·Granted Feb 4, 2025·0 cites·11 claims
- 1255US9240325B2Method for making an integrated circuitCOMMISSARIAT ENERGIE ATOMIQUE·Filed 2014·Granted Jan 19, 2016·0 cites·15 claims
- 1353US8889550B2Lithographic method for making networks of conductors connected by viasBELLEDENT JEROME·Filed 2011·Granted Nov 18, 2014·1 cites·10 claims
- 1446US2016099326A1Method for making an integrated circuitCOMMISSARIAT ENERGIE ATOMIQUE·Filed 2015·Application pending·0 cites
- 1542US9953807B2Method for producing patterns by ion implantationCOMMISSARIAT ENERGIE ATOMIQUE·Filed 2017·Granted Apr 24, 2018·0 cites·22 claims
- 1637US10875236B2Method for selective etching of a block copolymerCOMMISSARIAT ENERGIE ATOMIQUE·Filed 2016·Granted Dec 29, 2020·0 cites·12 claims
- 1735US8877622B2Process for producing an integrated circuitPOIROUX THIERRY·Filed 2011·Granted Nov 4, 2014·0 cites·12 claims
- 1833US8669188B2Method for making a pattern from sidewall image transferBARNOLA SEBASTIEN·Filed 2011·Granted Mar 11, 2014·0 cites·11 claims
Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →