Inventor · disambiguated record
Sandeep Kumar Goel
Also filed as: GOEL SANDEEP · GOEL SANDEEP K · GOEL SANDEEP KUMAR
107 granted patents·12 pending applications·327 citations·filing 2002–2025
99Inventor score
Files withTAIWAN SEMICONDUCTOR MFG CO LTD87GOEL SANDEEP KUMAR10TAIWAN SEMICONDUCTOR MFG8MEHTA ASHOK2CHUANG YI-LIN1
Top patents by PatentIndex Score
119 records- 0197US8751994B2System and method for testing stacked diesTAIWAN SEMICONDUCTOR MFG·Filed 2013·Granted Jun 10, 2014·32 cites·20 claims
- 0297US8561001B1System and method for testing stacked diesGOEL SANDEEP KUMAR·Filed 2012·Granted Oct 15, 2013·35 cites·7 claims
- 0394US12306248B2Scan chains with multi-bit cells and methods for testing the sameTAIWAN SEMICONDUCTOR MFG CO LTD·Filed 2023·Granted May 20, 2025·2 cites·20 claims
- 0494US11727177B2Integrated circuit design method, system and computer program productTAIWAN SEMICONDUCTOR MFG CO LTD·Filed 2022·Granted Aug 15, 2023·2 cites·20 claims
- 0594US11379643B2Integrated circuit design method, system and computer program productTAIWAN SEMICONDUCTOR MFG CO LTD·Filed 2020·Granted Jul 5, 2022·3 cites·20 claims
- 0694US8826202B1Reducing design verification time while maximizing system functional coverageTAIWAN SEMICONDUCTOR MFG·Filed 2013·Granted Sep 2, 2014·22 cites·20 claims
- 0794US8686570B2Multi-dimensional integrated circuit structures and methods of forming the sameSEMMELMEYER MARK·Filed 2012·Granted Apr 1, 2014·38 cites·20 claims
- 0893US10156607B2Bidirectional scan chain structure and methodTAIWAN SEMICONDUCTOR MFG CO LTD·Filed 2016·Granted Dec 18, 2018·6 cites·19 claims
- 0993US9054101B2Multi-dimensional integrated circuit structures and methods of forming the sameTAIWAN SEMICONDUCTOR MFG·Filed 2014·Granted Jun 9, 2015·13 cites·19 claims
- 1092US11699010B2Method and system for reducing migration errorsTAIWAN SEMICONDUCTOR MFG CO LTD·Filed 2021·Granted Jul 11, 2023·2 cites·20 claims
- 1192US11055455B1Method and system for reducing migration errorsTAIWAN SEMICONDUCTOR MFG CO LTD·Filed 2020·Granted Jul 6, 2021·3 cites·20 claims
- 1292US2025355043A1Scan architecture for interconnect testing in 3d integrated circuitsTAIWAN SEMICONDUCTOR MFG CO LTD·Filed 2025·Application pending·0 cites
- 1390US12066490B2Wrapper cell design and built-in self-test architecture for 3DIC test and diagnosisTAIWAN SEMICONDUCTOR MFG CO LTD·Filed 2022·Granted Aug 20, 2024·1 cites·20 claims
- 1490US8873320B2DRAM repair architecture for wide I/O DRAM based 2.5D/3D system chipsGOEL SANDEEP KUMAR·Filed 2012·Granted Oct 28, 2014·11 cites·20 claims
- 1588US9222983B2Circuit and method for monolithic stacked integrated circuit testingTAIWAN SEMICONDUCTOR MFG·Filed 2013·Granted Dec 29, 2015·7 cites·20 claims
- 1688US8836363B2Probe card partition schemeGOEL SANDEEP KUMAR·Filed 2011·Granted Sep 16, 2014·6 cites·20 claims
- 1788US8436639B2Circuits and methods for testing through-silicon viasGOEL SANDEEP KUMAR·Filed 2011·Granted May 7, 2013·10 cites·21 claims
- 1888US8402404B1Stacked die interconnect validationMEHTA ASHOK·Filed 2011·Granted Mar 19, 2013·10 cites·20 claims
- 1988US2025327854A1Method of testing an integrated circuit and testing systemTAIWAN SEMICONDUCTOR MFG CO LTD·Filed 2025·Application pending·0 cites
- 2087US8627160B2System and device for reducing instantaneous voltage droop during a scan shift operationDEVTA-PRASANNA NARENDRA·Filed 2010·Granted Jan 7, 2014·13 cites·18 claims
- 2187US7380181B2Test circuit and method for hierarchical coreNXP BV·Filed 2005·Granted May 27, 2008·15 cites·39 claims
- 2287US2025307513A1System and method for esl modeling of machine learningTAIWAN SEMICONDUCTOR MFG CO LTD·Filed 2025·Application pending·0 cites
- 2386US12385973B2Scan architecture for interconnect testing in 3D integrated circuitsTAIWAN SEMICONDUCTOR MFG CO LTD·Filed 2024·Granted Aug 12, 2025·0 cites·20 claims
- 2485US11837308B2Systems and methods to detect cell-internal defectsTAIWAN SEMICONDUCTOR MFG CO LTD·Filed 2022·Granted Dec 5, 2023·1 cites·20 claims
- 2585US8566657B2Circuit and method for diagnosing scan chain failuresGOEL SANDEEP KUMAR·Filed 2011·Granted Oct 22, 2013·4 cites·12 claims
- 2684US12406123B2System and method for ESL modeling of machine learningTAIWAN SEMICONDUCTOR MFG CO LTD·Filed 2024·Granted Sep 2, 2025·0 cites·20 claims
- 2784US11663387B2Fault diagnosticsTAIWAN SEMICONDUCTOR MFG CO LTD·Filed 2021·Granted May 30, 2023·1 cites·20 claims
- 2884US9110136B2Circuit and method for monolithic stacked integrated circuit testingTAIWAN SEMICONDUCTOR MFG·Filed 2013·Granted Aug 18, 2015·4 cites·20 claims
- 2983US10985922B2Device with self-authenticationTAIWAN SEMICONDUCTOR MFG CO LTD·Filed 2018·Granted Apr 20, 2021·3 cites·20 claims
- 3083US10256828B2Phase-locked loop monitor circuitTAIWAN SEMICONDUCTOR MFG CO LTD·Filed 2017·Granted Apr 9, 2019·3 cites·18 claims
- 3182US10371751B2Circuit and method for diagnosing scan chain failuresTAIWAN SEMICONDUCTOR MFG CO LTD·Filed 2017·Granted Aug 6, 2019·1 cites·19 claims
- 3282US9686852B2Multi-dimensional integrated circuit structures and methods of forming the sameTAIWAN SEMICONDUCTOR MFG CO LTD·Filed 2015·Granted Jun 20, 2017·3 cites·20 claims
- 3381US12399211B2Method of testing an integrated circuit and testing systemTAIWAN SEMICONDUCTOR MFG CO LTD·Filed 2023·Granted Aug 26, 2025·0 cites·20 claims
- 3481US11899064B2Scan architecture for interconnect testing in 3D integrated circuitsTAIWAN SEMICONDUCTOR MFG CO LTD·Filed 2022·Granted Feb 13, 2024·0 cites·20 claims
- 3581US2024394440A1Function safety and fault management modeling at electrical system level (esl)TAIWAN SEMICONDUCTOR MFG CO LTD·Filed 2024·Application pending·0 cites
- 3680US10776538B2Function safety and fault management modeling at electrical system level (ESL)TAIWAN SEMICONDUCTOR MFG CO LTD·Filed 2017·Granted Sep 15, 2020·2 cites·20 claims
- 3780US2025231235A1Scan chains with multi-bit cells and methods for testing the sameTAIWAN SEMICONDUCTOR MFG CO LTD·Filed 2025·Application pending·0 cites
- 3880US2024361385A1Wrapper Cell Design and Built-In Self-Test Architecture for 3DIC Test and DiagnosisTAIWAN SEMICONDUCTOR MFG CO LTD·Filed 2024·Application pending·0 cites
- 3979US12368684B2Network-on-chip system and a method of generating the sameTAIWAN SEMICONDUCTOR MFG CO LTD·Filed 2024·Granted Jul 22, 2025·0 cites·20 claims
- 4079US10867098B1System and method for ESL modeling of machine learningTAIWAN SEMICONDUCTOR MFG CO LTD·Filed 2019·Granted Dec 15, 2020·2 cites·20 claims
- 4179US9817029B2Test probing structureWANG MILL-JER·Filed 2011·Granted Nov 14, 2017·4 cites·20 claims
- 4278US11295831B2Systems and methods to detect cell-internal defectsTAIWAN SEMICONDUCTOR MFG CO LTD·Filed 2020·Granted Apr 5, 2022·1 cites·20 claims
- 4378US10685157B2Power-aware scan partitioningTAIWAN SEMICONDUCTOR MFG CO LTD·Filed 2018·Granted Jun 16, 2020·1 cites·17 claims
- 4478US10539617B2Scan architecture for interconnect testing in 3D integrated circuitsTAIWAN SEMICONDUCTOR MFG CO LTD·Filed 2016·Granted Jan 21, 2020·1 cites·20 claims
- 4578US9646128B2System and method for validating stacked dies by comparing connectionsTAIWAN SEMICONDUCTOR MFG CO LTD·Filed 2015·Granted May 9, 2017·2 cites·20 claims
- 4678US2025377688A1Circuit and methodology for power profileTAIWAN SEMICONDUCTOR MFG CO LTD·Filed 2025·Application pending·0 cites
- 4777US12425224B2Device with self-authenticationTAIWAN SEMICONDUCTOR MFG CO LTD·Filed 2023·Granted Sep 23, 2025·0 cites·20 claims
- 4877US12314644B2Integrated circuit design method, system and computer program productTAIWAN SEMICONDUCTOR MFG CO LTD·Filed 2023·Granted May 27, 2025·0 cites·20 claims
- 4977US12229483B2Method and system for reducing migration errorsTAIWAN SEMICONDUCTOR MFG CO LTD·Filed 2023·Granted Feb 18, 2025·0 cites·20 claims
- 5077US9791510B2Circuit and method for diagnosing scan chain failuresTAIWAN SEMICONDUCTOR MFG CO LTD·Filed 2015·Granted Oct 17, 2017·1 cites·13 claims
Showing the top 50 of 119 patent records by PatentIndex Score.
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →