Inventor · disambiguated record

Parthasarathy Rajagopalan

Also filed as: RAJAGOPALAN PARTHASARATHY

1 granted patent·1 pending application·2 citations·filing 2005–2005

19Inventor score

Technology areasH10W

Files withLSI LOGIC CORP2

Top patents by PatentIndex Score

2 records

0155US7354790B2Method and apparatus for avoiding dicing chip-outs in integrated circuit dieLSI LOGIC CORP·Filed 2005·Granted Apr 8, 2008·2 cites·18 claims
0233US2007013068A1Integrated circuit package and method with an electrical component embedded in a substrate viaLSI LOGIC CORP·Filed 2005·Application pending·0 cites

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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →