Inventor · disambiguated record
Mahdi Parvizi
Also filed as: PARVIZI MAHDI
22 granted patents·1 pending application·140 citations·filing 2016–2025
95Inventor score
Top patents by PatentIndex Score
23 records- 0196US10903841B1Apparatus and methods for high frequency clock generationCIENA CORP·Filed 2020·Granted Jan 26, 2021·14 cites·20 claims
- 0296US10715155B1Apparatus and methods for digital phase locked loop with analog proportional control functionCIENA CORP·Filed 2019·Granted Jul 14, 2020·16 cites·20 claims
- 0395US10848164B1Apparatus and methods for digital fractional phase locked loop with a current mode low pass filterCIENA CORP·Filed 2020·Granted Nov 24, 2020·10 cites·17 claims
- 0494US10727854B1Apparatus and methods for realization of N time interleaved digital-to-analog convertersCIENA CORP·Filed 2019·Granted Jul 28, 2020·15 cites·20 claims
- 0594US10678112B2Fully differential traveling wave series push-pull mach-zehnder modulatorCIENA CORP·Filed 2018·Granted Jun 9, 2020·7 cites·12 claims
- 0693US10680585B2Techniques and circuits for time-interleaved injection locked voltage controlled oscillators with jitter accumulation resetCIENA CORP·Filed 2018·Granted Jun 9, 2020·6 cites·17 claims
- 0793US10516403B1High-order phase tracking loop with segmented proportional and integral controlsCIENA CORP·Filed 2019·Granted Dec 24, 2019·10 cites·20 claims
- 0893US10425099B1Extremely-fine resolution sub-ranging current mode Digital-Analog-Converter using Sigma-Delta modulatorsCIENA CORP·Filed 2018·Granted Sep 24, 2019·17 cites·20 claims
- 0992US10320374B2Fine resolution high speed linear delay elementCIENA CORP·Filed 2017·Granted Jun 11, 2019·9 cites·20 claims
- 1089US10749536B1High-order phase tracking loop with segmented proportional and integral controlsCIENA CORP·Filed 2019·Granted Aug 18, 2020·5 cites·19 claims
- 1187US10330962B1Patterned accumulation mode capacitive phase shifterCIENA CORP·Filed 2018·Granted Jun 25, 2019·7 cites·20 claims
- 1286US11196534B1Apparatus and methods for low power clock generation in multi-channel high speed devicesCIENA CORP·Filed 2020·Granted Dec 7, 2021·2 cites·20 claims
- 1385US10536303B1Quarter-rate charge-steering decision feedback equalizer (DFE) tapsPIKE JACOB·Filed 2018·Granted Jan 14, 2020·8 cites·20 claims
- 1484US10554453B1Quarter-rate charge-steering decision feedback equalizer (DFE)PARVIZI MAHDI·Filed 2019·Granted Feb 4, 2020·8 cites·20 claims
- 1583US11012081B2Apparatus and methods for digital phase locked loop with analog proportional control functionCIENA CORP·Filed 2020·Granted May 18, 2021·2 cites·18 claims
- 1675US9787466B2High order hybrid phase locked loop with digital scheme for jitter suppressionAOUINI SADOK·Filed 2016·Granted Oct 10, 2017·4 cites·20 claims
- 1766US2025373339A1Receiver monitoring in linear receiver opticsCISCO TECH INC·Filed 2025·Application pending·0 cites
- 1861US11349486B1High-order phase tracking loop with segmented proportional and integral controlsCIENA CORP·Filed 2020·Granted May 31, 2022·0 cites·20 claims
- 1960US11245401B2Apparatus and methods for high frequency clock generationCIENA CORP·Filed 2020·Granted Feb 8, 2022·0 cites·20 claims
- 2059US11561570B2Apparatus and methods for low power frequency clock generation and distributionCIENA CORP·Filed 2020·Granted Jan 24, 2023·0 cites·20 claims
- 2156US11218155B2Apparatus and methods for digital fractional phase locked loop with a current mode low pass filterCIENA CORP·Filed 2020·Granted Jan 4, 2022·0 cites·17 claims
- 2255US11770203B2Matching transmitters with receivers for making network-level assignmentsCIENA CORP·Filed 2021·Granted Sep 26, 2023·0 cites·19 claims
- 2337US11804847B2Fractional frequency synthesis by sigma-delta modulating frequency of a reference clockCIENA CORP·Filed 2018·Granted Oct 31, 2023·0 cites·16 claims
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →