Inventor · disambiguated record
Venu M. Kondapalli
Also filed as: KONDAPALLI VENU · KONDAPALLI VENU M
35 granted patents·1,878 citations·filing 1995–2021
98Inventor score
Top patents by PatentIndex Score
35 records- 0198US7804719B1Programmable logic block having reduced output delay during RAM write processes when programmed to function in RAM modeXILINX INC·Filed 2005·Granted Sep 28, 2010·80 cites·16 claims
- 0298US7284226B1Methods and structures of providing modular integrated circuitsXILINX INC·Filed 2004·Granted Oct 16, 2007·274 cites·14 claims
- 0398US7075333B1Programmable circuit optionally configurable as a lookup table or a wide multiplexerXILINX INC·Filed 2004·Granted Jul 11, 2006·159 cites·22 claims
- 0498US6998872B1Lookup table circuit optionally configurable as two or more smaller lookup tables with independent inputsXILINX INC·Filed 2004·Granted Feb 14, 2006·252 cites·27 claims
- 0597US7116131B1High performance programmable logic devices utilizing dynamic circuitryXILINX INC·Filed 2004·Granted Oct 3, 2006·107 cites·96 claims
- 0696US7518396B1Apparatus and method for reconfiguring a programmable logic deviceXILINX INC·Filed 2007·Granted Apr 14, 2009·120 cites·16 claims
- 0796US6768338B1PLD lookup table including transistors of more than one oxide thicknessXILINX INC·Filed 2003·Granted Jul 27, 2004·62 cites·43 claims
- 0895US6366117B1Nonvolatile/battery-backed key in PLDXILINX INC·Filed 2000·Granted Apr 2, 2002·126 cites·7 claims
- 0994US7061271B1Six-input look-up table for use in a field programmable gate arrayXILINX INC·Filed 2004·Granted Jun 13, 2006·58 cites·16 claims
- 1094US6441641B1Programmable logic device with partial battery backupXILINX INC·Filed 2000·Granted Aug 27, 2002·113 cites·6 claims
- 1193US7283409B1Data monitoring for single event upset in a programmable logic deviceXILINX INC·Filed 2006·Granted Oct 16, 2007·22 cites·11 claims
- 1293US7215138B1Programmable lookup table with dual input and output terminals in shift register modeXILINX INC·Filed 2005·Granted May 8, 2007·25 cites·20 claims
- 1393US5958026AInput/output buffer supporting multiple I/O standardsXILINX INC·Filed 1997·Granted Sep 28, 1999·96 cites·16 claims
- 1491US7375552B1Programmable logic block with dedicated and selectable lookup table outputs coupled to general interconnect structureXILINX INC·Filed 2005·Granted May 20, 2008·26 cites·11 claims
- 1591US7268587B1Programmable logic block with carry chains providing lookahead functions of different lengthsXILINX INC·Filed 2005·Granted Sep 11, 2007·25 cites·20 claims
- 1691US6294930B1FPGA with a plurality of input reference voltage levelsXILINX INC·Filed 2000·Granted Sep 25, 2001·31 cites·2 claims
- 1790US7265576B1Programmable lookup table with dual input and output terminals in RAM modeXILINX INC·Filed 2005·Granted Sep 4, 2007·19 cites·18 claims
- 1889US5877632AFPGA with a plurality of I/O voltage levelsXILINX INC·Filed 1997·Granted Mar 2, 1999·43 cites·7 claims
- 1988US7202697B1Programmable logic block having improved performance when functioning in shift register modeXILINX INC·Filed 2005·Granted Apr 10, 2007·17 cites·20 claims
- 2086US6049227AFPGA with a plurality of I/O voltage levelsXILINX INC·Filed 1998·Granted Apr 11, 2000·33 cites·15 claims
- 2184US6753722B1Method and apparatus for voltage regulation within an integrated circuitXILINX INC·Filed 2003·Granted Jun 22, 2004·27 cites·17 claims
- 2283US6949951B1Integrated circuit multiplexer including transistors of more than one oxide thicknessXILINX INC·Filed 2004·Granted Sep 27, 2005·21 cites·54 claims
- 2383US6768335B1Integrated circuit multiplexer including transistors of more than one oxide thicknessXILINX INC·Filed 2003·Granted Jul 27, 2004·21 cites·46 claims
- 2479US7468616B1Circuit for and method of generating a delay in an input/output port of an integrated circuit deviceXILINX INC·Filed 2006·Granted Dec 23, 2008·10 cites·19 claims
- 2579US6448809B2FPGA with a plurality of input reference voltage levelsXILINX INC·Filed 2001·Granted Sep 10, 2002·14 cites·11 claims
- 2677US7109783B1Method and apparatus for voltage regulation within an integrated circuitXILINX INC·Filed 2004·Granted Sep 19, 2006·20 cites·11 claims
- 2772US7456654B1Method and apparatus for a programmable level translatorXILINX INC·Filed 2006·Granted Nov 25, 2008·7 cites·17 claims
- 2872US7053654B1PLD lookup table including transistors of more than one oxide thicknessXILINX INC·Filed 2004·Granted May 30, 2006·12 cites·52 claims
- 2971US7075332B1Six-input look-up table and associated memory control circuitry for use in a field programmable gate arrayXILINX INC·Filed 2004·Granted Jul 11, 2006·14 cites·11 claims
- 3070US7119570B1Method of measuring performance of a semiconductor device and circuit for the sameXILINX INC·Filed 2004·Granted Oct 10, 2006·14 cites·18 claims
- 3162US7109746B1Data monitoring for single event upset in a programmable logic deviceXILINX INC·Filed 2004·Granted Sep 19, 2006·8 cites·14 claims
- 3259US12249988B2Circuits and methods for detecting decreases in a supply voltage in an integrated circuitINTEL CORP·Filed 2021·Granted Mar 11, 2025·0 cites·20 claims
- 3356US7382157B1Interconnect driver circuits for dynamic logicXILINX INC·Filed 2006·Granted Jun 3, 2008·2 cites·17 claims
- 3455US5694047AMethod and system for measuring antifuse resistanceXILINX INC·Filed 1995·Granted Dec 2, 1997·18 cites·18 claims
- 3547US6204691B1FPGA with a plurality of input reference voltage levels grouped into setsXILINX INC·Filed 2000·Granted Mar 20, 2001·2 cites·4 claims
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →