Inventor · disambiguated record
Jozef L. Van Meerbergen
Also filed as: MEERBERGEN JOZEF LOUIS VAN · MEERBERGEN JOZEF VAN · VAN MEERBERGEN JOZEF L · VAN MEERBERGEN JOZEF LOUIS
12 granted patents·2 pending applications·153 citations·filing 1984–2009
92Inventor score
Files withPHILIPS CORP8KONINKL PHILIPS ELECTRONICS NV3DE OLIVERIRA KASTRUP PEREIRA B1VAN MEERBERGEN JOZEF LOUIS1
Top patents by PatentIndex Score
14 records- 0166US5276827AData buffer for the duration of cyclically recurrent buffer periodsPHILIPS CORP·Filed 1990·Granted Jan 4, 1994·20 cites·14 claims
- 0263US7113554B2Turbo decoder system comprising parallel decodersKONINKL PHILIPS ELECTRONICS NV·Filed 2002·Granted Sep 26, 2006·13 cites·11 claims
- 0360US6643738B2Data processor utilizing set-associative cache memory for stream and non-stream memory addressesKONINKL PHILIPS ELECTRONICS NV·Filed 2000·Granted Nov 4, 2003·10 cites·2 claims
- 0455US8312160B2Wireless sensor node architecture with autonomous streamingVAN MEERBERGEN JOZEF LOUIS·Filed 2009·Granted Nov 13, 2012·3 cites·16 claims
- 0554US4689738AIntegrated and programmable processor for word-wise digital signal processingPHILIPS CORP·Filed 1984·Granted Aug 25, 1987·23 cites·18 claims
- 0648US5121355AIntegrated semiconductor memory and signal processorPHILIPS CORP·Filed 1990·Granted Jun 9, 1992·15 cites·4 claims
- 0744US2006152087A1Embedded computing system with reconfigurable power supply and/or clock frequency domainsDE OLIVERIRA KASTRUP PEREIRA B·Filed 2004·Application pending·0 cites
- 0840US5613152AData processor with operation units executing dyadic and monadic operations sharing groups of register files with one of the units exclusively accessing one of the register filesPHILIPS CORP·Filed 1995·Granted Mar 18, 1997·17 cites·5 claims
- 0938US6400410B1Signal processing device and method of planning connections between processors in a signal processing deviceKONINKL PHILIPS ELECTRONICS NV·Filed 1998·Granted Jun 4, 2002·12 cites·9 claims
- 1038US4866715AMethod of testing a modified booth multiplier, modified booth multiplier suitable for testing by means of this method, and integrated circuit comprising such a modified booth multiplierPHILIPS CORP·Filed 1988·Granted Sep 12, 1989·12 cites·23 claims
- 1138US4730266ALogic full adder circuitPHILIPS CORP·Filed 1985·Granted Mar 8, 1988·13 cites·8 claims
- 1234US6049818ASignal processing devicePHILIPS CORP·Filed 1997·Granted Apr 11, 2000·9 cites·20 claims
- 1334US4761734AData-processing apparatus provided with a finite-state machine to perform a program jumpPHILIPS CORP·Filed 1986·Granted Aug 2, 1988·6 cites·4 claims
- 1425US2002009001A1Integrated circuit with a matrix of programmable logic cellsFiled 2001·Application pending·0 cites
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →