Inventor · disambiguated record
Jiann-Jeng Duh
Also filed as: DUH JIANN-JENG · DUH JIANN-JENG JOHN
8 granted patents·1 pending application·126 citations·filing 2001–2007
88Inventor score
Files withINTEGRATED DEVICE TECH8
Top patents by PatentIndex Score
9 records- 0187US6778454B2FIFO memory devices that support all combinations of DDR and SDR read and write modesINTEGRATED DEVICE TECH·Filed 2003·Granted Aug 17, 2004·39 cites·21 claims
- 0283US6795360B2Fifo memory devices that support all four combinations of DDR or SDR write modes with DDR or SDR read modesINTEGRATED DEVICE TECH·Filed 2001·Granted Sep 21, 2004·29 cites·56 claims
- 0374US7158440B2FIFO memory devices having write and read control circuits that support x4N, x2N and xN data widths during DDR and SDR modes of operationINTEGRATED DEVICE TECH·Filed 2004·Granted Jan 2, 2007·16 cites·10 claims
- 0464US7246300B1Sequential flow-control and FIFO memory devices having error detection and correction capability with diagnostic bit generationINTEGRATED DEVICE TECH·Filed 2004·Granted Jul 17, 2007·10 cites·6 claims
- 0562US7093047B2Integrated circuit memory devices having clock signal arbitration circuits therein and methods of performing clock signal arbitrationINTEGRATED DEVICE TECH·Filed 2003·Granted Aug 15, 2006·12 cites·22 claims
- 0659US7076610B2FIFO memory devices having multi-port cache memory arrays therein that support hidden EDC latency and bus matching and methods of operating sameINTEGRATED DEVICE TECH·Filed 2003·Granted Jul 11, 2006·7 cites·5 claims
- 0758US7209983B2Sequential flow-control and FIFO memory devices that are depth expandable in standard mode operationINTEGRATED DEVICE TECH·Filed 2003·Granted Apr 24, 2007·9 cites·12 claims
- 0856US7710789B2Synchronous address and data multiplexed mode for SRAMINTEGRATED DEVICE TECH·Filed 2007·Granted May 4, 2010·4 cites·7 claims
- 0931US2004047209A1FIFO memory devices having multi-port cache memory arrays therein that support hidden EDC latency and bus matching and methods of operating sameFiled 2003·Application pending·0 cites
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →