Inventor · disambiguated record
Wayne Kever
Also filed as: KEVER WAYNE · KEVER WAYNE D · KEVER WAYNE DERVON
10 granted patents·3 pending applications·161 citations·filing 1999–2014
89Inventor score
Top patents by PatentIndex Score
13 records- 0187US6735673B2Apparatus and methods for cache line compressionHEWLETT PACKARD DEVELOPMENT CO·Filed 2002·Granted May 11, 2004·59 cites·18 claims
- 0280US6640283B2Apparatus for cache compression engine for data compression of on-chip caches to increase effective cache sizeHEWLETT PACKARD DEVELOPMENT CO·Filed 2002·Granted Oct 28, 2003·31 cites·4 claims
- 0379US6643828B2Method for controlling critical circuits in the design of integrated circuitsHEWLETT PACKARD DEVELOPMENT CO·Filed 2001·Granted Nov 4, 2003·34 cites·14 claims
- 0470US8733312B1Tunnel ram intake manifold for improved low RPM operationKEVER WAYNE·Filed 2011·Granted May 27, 2014·2 cites·17 claims
- 0564US9163594B1Tunnel ram intake manifold for improved low RPM operationKEVER WAYNE·Filed 2014·Granted Oct 20, 2015·1 cites·15 claims
- 0661US7055114B2Systems and processes for asymmetrically shrinking a VLSI layoutHEWLETT PACKARD DEVELOPMENT CO·Filed 2003·Granted May 30, 2006·8 cites·18 claims
- 0756US6895497B2Multidispatch CPU integrated circuit having virtualized and modular resources and adjustable dispatch priorityHEWLETT PACKARD DEVELOPMENT CO·Filed 2002·Granted May 17, 2005·5 cites·5 claims
- 0855US6645841B2Selective solder bump applicationHEWLETT PACKARD DEVELOPMENT CO·Filed 2001·Granted Nov 11, 2003·6 cites·22 claims
- 0955US6265897B1Contention based logic gate driving a latch and driven by pulsed clockHEWLETT PACKARD CO·Filed 1999·Granted Jul 24, 2001·13 cites·24 claims
- 1046US6933611B2Selective solder bump applicationHEWLETT PACKARD DEVELOPMENT CO·Filed 2003·Granted Aug 23, 2005·2 cites·11 claims
- 1138US2003145239A1Dynamically adjustable cache size based on application behavior to save powerFiled 2002·Application pending·0 cites
- 1234US2003145170A1Dynamically adjusted cache power supply to optimize for cache access or power consumptionFiled 2002·Application pending·0 cites
- 1330US2003076729A1Method and apparatus for reducing average power and increasing cache performance by modulating power suppliesFiled 2001·Application pending·0 cites
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →