Inventor · disambiguated record
Phey-Chuin Tan
Also filed as: TAN PHEY-CHUIN
2 granted patents·60 citations·filing 2012–2012
62Inventor score
Technology areasH03K
Files withEASIC CORP2
Top patents by PatentIndex Score
2 records- 0193US8629548B1Clock network fishbone architecture for a structured ASIC manufactured on a 28 NM CMOS process lithographic nodeEASIC CORP·Filed 2012·Granted Jan 14, 2014·56 cites·20 claims
- 0273US8957398B2Via-configurable high-performance logic block involving transistor chainsEASIC CORP·Filed 2012·Granted Feb 17, 2015·4 cites·14 claims
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →