Inventor · disambiguated record

Christin Bartsch

Also filed as: BARTSCH CHRISTIN

7 granted patents·1 pending application·293 citations·filing 2005–2011

83Inventor score

Technology areasH10P H10W

Files withADVANCED MICRO DEVICES INC3 BARTSCH CHRISTIN2 FEUSTEL FRANK1 SCHALLER MATTHIAS1 SCHUEHRER HOLGER1

Top patents by PatentIndex Score

8 records

0197US7259091B2Technique for forming a passivation layer prior to depositing a barrier layer in a copper metallization layerADVANCED MICRO DEVICES INC·Filed 2005·Granted Aug 21, 2007·268 cites·10 claims
0285US7986040B2Method of reducing erosion of a metal cap layer during via patterning in semiconductor devicesADVANCED MICRO DEVICES INC·Filed 2009·Granted Jul 26, 2011·11 cites·8 claims
0385US7410885B2Method of reducing contamination by removing an interlayer dielectric from the substrate edgeADVANCED MICRO DEVICES INC·Filed 2006·Granted Aug 12, 2008·12 cites·12 claims
0458US8664115B2Copper interconnect with metal hardmask removalBARTSCH CHRISTIN·Filed 2011·Granted Mar 4, 2014·2 cites·20 claims
0548US8673087B2Reducing copper defects during a wet chemical cleaning of exposed copper surfaces in a metallization layer of a semiconductor deviceFEUSTEL FRANK·Filed 2008·Granted Mar 18, 2014·0 cites·16 claims
0646US8423320B2Method and system for quantitative inline material characterization in semiconductor production processes based on structural measurements and related modelsSCHALLER MATTHIAS·Filed 2009·Granted Apr 16, 2013·0 cites·26 claims
0745US8338293B2Method of reducing erosion of a metal cap layer during via patterning in semiconductor devicesBARTSCH CHRISTIN·Filed 2011·Granted Dec 25, 2012·0 cites·16 claims
0834US2006141775A1Method of forming electrical connections in a semiconductor structureSCHUEHRER HOLGER·Filed 2005·Application pending·0 cites

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