Inventor · disambiguated record
Daniel E. Hurlimann
Also filed as: HUERLIMANN DANIEL · HURLIMANN DANIEL E · HURLIMANN DANIEL ERNEST
16 granted patents·6 pending applications·136 citations·filing 1986–2019
93Inventor score
Top patents by PatentIndex Score
22 records- 0193US7594144B2Handling fatal computer hardware errorsIBM·Filed 2006·Granted Sep 22, 2009·41 cites·24 claims
- 0292US9710395B1Dynamic address translation table allocationIBM·Filed 2016·Granted Jul 18, 2017·12 cites·12 claims
- 0388US6530323B2Detachable inking device for a flexographic printing machine, its embodiment, cleaning and use in such a machineBOBST SA·Filed 2002·Granted Mar 11, 2003·12 cites·10 claims
- 0485US6526884B1Detachable inking device for a flexographic printing machine, its embodiment, cleaning and use in such a machineBOBST SA·Filed 2000·Granted Mar 4, 2003·11 cites·7 claims
- 0583US6543359B2Detachable inking device for a flexographic printing machine, its embodiment, cleaning and use in such a machineBOBST SA·Filed 2002·Granted Apr 8, 2003·9 cites·1 claims
- 0683US6539861B2Detachable inking device for a flexographic printing machine, its embodiment, cleaning and use in such a machineBOBST SA·Filed 2002·Granted Apr 1, 2003·9 cites·4 claims
- 0778US10832536B2Guided cable managementIBM·Filed 2018·Granted Nov 10, 2020·4 cites·20 claims
- 0877US10331605B2Dynamic re-allocation of signal lanesIBM·Filed 2016·Granted Jun 25, 2019·2 cites·17 claims
- 0976US7797475B2Flexibly configurable multi central processing unit (CPU) supported hypertransport switchingIBM·Filed 2007·Granted Sep 14, 2010·9 cites·6 claims
- 1075US7956552B2Apparatus, system, and method for device group identificationINTERNAT BUSINESS MACHINESS CORP·Filed 2008·Granted Jun 7, 2011·6 cites·18 claims
- 1174US10296484B2Dynamic re-allocation of computer bus lanesIBM·Filed 2015·Granted May 21, 2019·2 cites·20 claims
- 1273US10275362B2Dynamic address translation table allocationIBM·Filed 2018·Granted Apr 30, 2019·1 cites·14 claims
- 1366US7853638B2Structure for a flexibly configurable multi central processing unit (CPU) supported hypertransport switchingIBM·Filed 2008·Granted Dec 14, 2010·4 cites·10 claims
- 1458US10025725B2Dynamic address translation table allocationIBM·Filed 2017·Granted Jul 17, 2018·0 cites·14 claims
- 1556US2019243797A1Dynamic re-allocation of signal lanesIBM·Filed 2019·Application pending·0 cites
- 1648US2017177179A1E-reader summarization and customized dictionaryIBM·Filed 2016·Application pending·0 cites
- 1747US2017177178A1E-reader summarization and customized dictionaryIBM·Filed 2015·Application pending·0 cites
- 1842US4829462ACommunication bit pattern detection circuitIBM·Filed 1986·Granted May 9, 1989·14 cites·11 claims
- 1940US2007240019A1Systems and methods for correcting errors in I2C bus communicationsIBM·Filed 2005·Application pending·0 cites
- 2039US10102074B2Switching allocation of computer bus lanesIBM·Filed 2015·Granted Oct 16, 2018·0 cites·17 claims
- 2137US2017154000A1Dynamic Re-Allocation of Computer Bus LanesIBM·Filed 2015·Application pending·0 cites
- 2237US2017153989A1Dynamic Allocation of Computer Bus LanesIBM·Filed 2015·Application pending·0 cites
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →