Inventor · disambiguated record
Elsbeth Lauren Tagayo Villapana
Also filed as: VILLAPANA ELSBETH LAUREN T · VILLAPANA ELSBETH LAUREN TAGAYO
6 granted patents·133 citations·filing 2010–2018
83Inventor score
Technology areasG06F
Top patents by PatentIndex Score
6 records- 0195US8788725B2Multilevel memory bus system for solid-state mass storageBITMICRO NETWORKS INC·Filed 2013·Granted Jul 22, 2014·41 cites·27 claims
- 0295US8447908B2Multilevel memory bus system for solid-state mass storageBRUCE RICARDO H·Filed 2010·Granted May 21, 2013·73 cites·29 claims
- 0385US10877907B2Multilevel memory bus systemBITMICRO LLC·Filed 2018·Granted Dec 29, 2020·3 cites·17 claims
- 0484US10489318B1Scatter-gather approach for parallel data transfer in a mass storage systemBITMICRO NETWORKS INC·Filed 2015·Granted Nov 26, 2019·6 cites·16 claims
- 0583US9971524B1Scatter-gather approach for parallel data transfer in a mass storage systemBITMICRO NETWORKS INC·Filed 2014·Granted May 15, 2018·10 cites·20 claims
- 0656US10133686B2Multilevel memory bus systemBITMICRO LLC·Filed 2014·Granted Nov 20, 2018·0 cites·36 claims
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →