Inventor · disambiguated record
Dirk Utess
Also filed as: UTESS DIRK
5 granted patents·20 citations·filing 2011–2023
70Inventor score
Top patents by PatentIndex Score
5 records- 0190US8598579B2Test structure for ILD void testing and contact resistance measurement in a semiconductor deviceCHUMAKOV DMYTRO·Filed 2011·Granted Dec 3, 2013·18 cites·16 claims
- 0267US12324213B2Stress layout optimization for device performanceGLOBALFOUNDRIES US INC·Filed 2023·Granted Jun 3, 2025·0 cites·13 claims
- 0364US9147618B2Method for detecting defects in a diffusion barrier layerGLOBALFOUNDRIES INC·Filed 2013·Granted Sep 29, 2015·2 cites·20 claims
- 0455US11664432B2Stress layout optimization for device performanceGLOBALFOUNDRIES US INC·Filed 2019·Granted May 30, 2023·0 cites·12 claims
- 0535US10923594B2Methods to reduce or prevent strain relaxation on PFET devices and corresponding novel IC productsGLOBALFOUNDRIES US INC·Filed 2018·Granted Feb 16, 2021·0 cites·20 claims
Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →