Inventor · disambiguated record
Luca Fasoli
Also filed as: FASOLI LUCA · FASOLI LUCA G · FASOLI LUCA GIOVANNI
94 granted patents·3 pending applications·3,833 citations·filing 2001–2024
99Inventor score
Files withSANDISK 3D LLC52YAN TIANHONG9MATRIX SEMICONDUCTOR INC7SCHEUERLEIN ROY E7ST MICROELECTRONICS INC6
Top patents by PatentIndex Score
97 records- 0199US7233024B2Three-dimensional memory device incorporating segmented bit line memory arraySANDISK 3D LLC·Filed 2003·Granted Jun 19, 2007·239 cites·37 claims
- 0299US7177191B2Integrated circuit including memory array incorporating multiple types of NAND string structuresSANDISK 3D LLC·Filed 2004·Granted Feb 13, 2007·335 cites·29 claims
- 0398US7733685B2Cross point memory cell with distributed diodes and method of making sameSANDISK 3D LLC·Filed 2008·Granted Jun 8, 2010·102 cites·29 claims
- 0498US7233522B2NAND memory array incorporating capacitance boosting of channel regions in unselected memory cells and method for operation of sameSANDISK 3D LLC·Filed 2003·Granted Jun 19, 2007·320 cites·44 claims
- 0598US7221588B2Memory array incorporating memory cells arranged in NAND stringsSANDISK 3D LLC·Filed 2003·Granted May 22, 2007·259 cites·15 claims
- 0698US7023739B2NAND memory array incorporating multiple write pulse programming of individual memory cells and method for operation of sameMATRIX SEMICONDUCTOR INC·Filed 2003·Granted Apr 4, 2006·299 cites·88 claims
- 0798US7005350B2Method for fabricating programmable memory array structures incorporating series-connected transistor stringsMATRIX SEMICONDUCTOR INC·Filed 2002·Granted Feb 28, 2006·453 cites·99 claims
- 0897US8547720B2Non-volatile memory having 3D array of read/write elements with efficient decoding of vertical bit lines and word linesSAMACHISA GEORGE·Filed 2011·Granted Oct 1, 2013·39 cites·12 claims
- 0997US7463546B2Method for using a passive element memory array incorporating reversible polarity word line and bit line decodersSANDISK 3D LLC·Filed 2006·Granted Dec 9, 2008·71 cites·25 claims
- 1097US7142471B2Method and apparatus for incorporating block redundancy in a memory arraySANDISK 3D LLC·Filed 2005·Granted Nov 28, 2006·83 cites·40 claims
- 1197US7057958B2Method and system for temperature compensation for memory cells with temperature-dependent behaviorSANDISK CORP·Filed 2003·Granted Jun 6, 2006·183 cites·33 claims
- 1296US8199576B2Three-dimensional array of re-programmable non-volatile memory elements having vertical bit lines and a double-global-bit-line architectureFASOLI LUCA·Filed 2010·Granted Jun 12, 2012·43 cites·18 claims
- 1396US7433233B2NAND memory array incorporating capacitance boosting of channel regions in unselected memory cells and method for operation of sameSANDISK 3D LLC·Filed 2007·Granted Oct 7, 2008·54 cites·24 claims
- 1496US7391638B2Memory device for protecting memory cells during programmingSANDISK 3D LLC·Filed 2006·Granted Jun 24, 2008·42 cites·6 claims
- 1596US7359279B2Integrated circuit memory array configuration including decoding compatibility with partial implementation of multiple memory layersSANDISK 3D LLC·Filed 2005·Granted Apr 15, 2008·29 cites·35 claims
- 1695US8027209B2Continuous programming of non-volatile memorySANDISK 3D LLC·Filed 2009·Granted Sep 27, 2011·30 cites·33 claims
- 1795US7508714B2Memory array incorporating mirrored NAND strings and non-shared global bit lines within a blockSANDISK 3D LLC·Filed 2007·Granted Mar 24, 2009·30 cites·17 claims
- 1894US8824191B2Non-volatile memory having 3D array of read/write elements and read/write circuits and method thereofSANDISK 3D LLC·Filed 2013·Granted Sep 2, 2014·16 cites·19 claims
- 1994US7486587B2Dual data-dependent busses for coupling read/write circuits to a memory arraySANDISK 3D LLC·Filed 2006·Granted Feb 3, 2009·33 cites·26 claims
- 2094US7272052B2Decoding circuit for non-binary groups of memory line driversSANDISK 3D LLC·Filed 2005·Granted Sep 18, 2007·33 cites·27 claims
- 2194US6849905B2Semiconductor device with localized charge storage dielectric and method of making sameMATRIX SEMICONDUCTOR INC·Filed 2002·Granted Feb 1, 2005·79 cites·41 claims
- 2293US8233309B2Non-volatile memory array architecture incorporating 1T-1R near 4F2 memory cellFASOLI LUCA G·Filed 2009·Granted Jul 31, 2012·35 cites·21 claims
- 2393US7633829B2Hierarchical decoding of dense memory arrays using multiple levels of multiple-headed decodersSANDISK 3D LLC·Filed 2007·Granted Dec 15, 2009·27 cites·26 claims
- 2493US7505321B2Programmable memory array structure incorporating series-connected transistor strings and methods for fabrication and operation of sameSANDISK 3D LLC·Filed 2002·Granted Mar 17, 2009·84 cites·32 claims
- 2592US8238174B2Continuous programming of non-volatile memoryYAN TIANHONG·Filed 2011·Granted Aug 7, 2012·12 cites·22 claims
- 2692US6552935B2Dual bank flash memory device and methodST MICROELECTRONICS INC·Filed 2001·Granted Apr 22, 2003·67 cites·34 claims
- 2791US7940554B2Reduced complexity array line drivers for 3D matrix arraysSANDISK 3D LLC·Filed 2009·Granted May 10, 2011·24 cites·56 claims
- 2891US7696805B2Level shifter circuit incorporating transistor snap-back protectionSANDISK 3D LLC·Filed 2007·Granted Apr 13, 2010·20 cites·23 claims
- 2991US7218570B2Apparatus and method for memory operations using address-dependent conditionsSANDISK 3D LLC·Filed 2004·Granted May 15, 2007·58 cites·45 claims
- 3090US7420850B2Method for controlling current during programming of memory cellsSANDISK 3D LLC·Filed 2006·Granted Sep 2, 2008·22 cites·15 claims
- 3189US8397024B2Page buffer program command and methods to reprogram pages without re-inputting data to a memory deviceFASOLI LUCA·Filed 2009·Granted Mar 12, 2013·22 cites·24 claims
- 3289US8223525B2Page register outside array and sense amplifier interfaceBALAKRISHNAN GOPINATH·Filed 2009·Granted Jul 17, 2012·24 cites·21 claims
- 3389US8059447B2Capacitive discharge method for writing to non-volatile memorySCHEUERLEIN ROY E·Filed 2008·Granted Nov 15, 2011·17 cites·25 claims
- 3489US7554832B2Passive element memory array incorporating reversible polarity word line and bit line decodersSANDISK 3D LLC·Filed 2006·Granted Jun 30, 2009·21 cites·29 claims
- 3589US7499366B2Method for using dual data-dependent busses for coupling read/write circuits to a memory arraySANDISK 3D LLC·Filed 2006·Granted Mar 3, 2009·15 cites·26 claims
- 3688US8841648B2Multi-level memory arrays with memory cells that employ bipolar storage elements and methods of forming the sameCHEN YUNG-TIN·Filed 2010·Granted Sep 23, 2014·9 cites·20 claims
- 3788US7966532B2Method for selectively retrieving column redundancy data in memory deviceSANDISK 3D LLC·Filed 2009·Granted Jun 21, 2011·26 cites·20 claims
- 3888US7286439B2Apparatus and method for hierarchical decoding of dense memory arrays using multiple levels of multiple-headed decodersSANDISK 3D LLC·Filed 2004·Granted Oct 23, 2007·41 cites·41 claims
- 3987US7463536B2Memory array incorporating two data busses for memory array block selectionSANDISK 3D LLC·Filed 2006·Granted Dec 9, 2008·18 cites·30 claims
- 4086US8509025B2Memory array circuit incorporating multiple array block selection and related methodSCHEUERLEIN ROY E·Filed 2011·Granted Aug 13, 2013·7 cites·11 claims
- 4185US9245629B2Method for non-volatile memory having 3D array of read/write elements with efficient decoding of vertical bit lines and word linesSANDISK 3D LLC·Filed 2013·Granted Jan 26, 2016·8 cites·17 claims
- 4284US8526237B2Non-volatile memory having 3D array of read/write elements and read/write circuits and method thereofSAMACHISA GEORGE·Filed 2011·Granted Sep 3, 2013·8 cites·10 claims
- 4384US8213243B2Program cycle skipBALAKRISHNAN GOPINATH·Filed 2009·Granted Jul 3, 2012·11 cites·23 claims
- 4484US7542338B2Method for reading a multi-level passive element memory cell arraySANDISK 3D LLC·Filed 2006·Granted Jun 2, 2009·14 cites·34 claims
- 4584US7383476B2System architecture and method for three-dimensional memorySANDISK 3D LLC·Filed 2004·Granted Jun 3, 2008·37 cites·14 claims
- 4684US6490197B1Sector protection circuit and method for flash memory devicesST MICROELECTRONICS INC·Filed 2001·Granted Dec 3, 2002·35 cites·31 claims
- 4783US8111539B2Smart detection circuit for writing to non-volatile storageFASOLI LUCA G·Filed 2008·Granted Feb 7, 2012·16 cites·21 claims
- 4883US7298665B2Dual-mode decoder circuit, integrated circuit memory array incorporating same, and related methods of operationSANDISK 3D LLC·Filed 2004·Granted Nov 20, 2007·33 cites·43 claims
- 4983US7177183B2Multiple twin cell non-volatile memory array and logic block structure and method thereforSANDISK 3D LLC·Filed 2003·Granted Feb 13, 2007·31 cites·53 claims
- 5082US8130528B2Memory system with sectional data linesYAN TIANHONG·Filed 2009·Granted Mar 6, 2012·9 cites·19 claims
Showing the top 50 of 97 patent records by PatentIndex Score.
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