Inventor · disambiguated record
Bart Swinnen
Also filed as: SWINNEN BART · SWINNEN BART LUC
11 granted patents·1 pending application·147 citations·filing 2003–2014
90Inventor score
Top patents by PatentIndex Score
12 records- 0196US7566634B2Method for chip singulationIMEC INTER UNI MICRO ELECTR·Filed 2005·Granted Jul 28, 2009·53 cites·30 claims
- 0290US7939926B2Via first plus via last technique for IC interconnectsQUALCOMM INC·Filed 2008·Granted May 10, 2011·15 cites·12 claims
- 0389US9646930B2Semiconductor device having through-substrate viasIMEC·Filed 2014·Granted May 9, 2017·12 cites·16 claims
- 0488US7042552B1Alignment strategy optimization methodASML NETHERLANDS BV·Filed 2004·Granted May 9, 2006·33 cites·8 claims
- 0585US7795113B2Method for bonding a die or substrate to a carrierIMEC·Filed 2007·Granted Sep 14, 2010·11 cites·11 claims
- 0683US7985620B2Method of fabricating via first plus via last IC interconnectQUALCOMM INC·Filed 2010·Granted Jul 26, 2011·5 cites·14 claims
- 0772US8809188B2Method for fabricating through substrate viasTEZCAN DENIZ SABUNCUOGLU·Filed 2010·Granted Aug 19, 2014·4 cites·15 claims
- 0870US7565219B2Lithographic apparatus, method of determining a model parameter, device manufacturing method, and device manufactured therebyASML NETHERLANDS BV·Filed 2003·Granted Jul 21, 2009·9 cites·9 claims
- 0965US10332850B2Method for producing contact areas on a semiconductor substrateIMEC·Filed 2014·Granted Jun 25, 2019·2 cites·14 claims
- 1054US7558643B2Lithographic apparatus, method of determining a model parameter, device manufacturing method, and device manufactured therebyASML NETHERLANDS BV·Filed 2004·Granted Jul 7, 2009·3 cites·25 claims
- 1149US8076768B2IC interconnectKASKOUN KENNETH·Filed 2010·Granted Dec 13, 2011·0 cites·12 claims
- 1233US2010264538A1Method for producing electrical interconnects and devices made thereofIMEC·Filed 2010·Application pending·0 cites
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →