Inventor · disambiguated record
Bret L. Toll
Also filed as: TOLL BRET · TOLL BRET L · TOLL BRET LESLIE
200 granted patents·49 pending applications·1,360 citations·filing 1998–2025
99Inventor score
Files withINTEL CORP186OULD-AHMED-VALL ELMOUSTAPHA15AMPERE COMPUTING LLC9TOLL BRET L9VALENTINE ROBERT5
Top patents by PatentIndex Score
249 records- 0199US12039332B2Systems, methods, and apparatus for matrix moveINTEL CORP·Filed 2022·Granted Jul 16, 2024·7 cites·20 claims
- 0299US11954489B2Systems for performing instructions to quickly convert and use tiles as 1D vectorsINTEL CORP·Filed 2021·Granted Apr 9, 2024·9 cites·43 claims
- 0399US11748103B2Systems and methods for performing matrix compress and decompress instructionsINTEL CORP·Filed 2022·Granted Sep 5, 2023·9 cites·20 claims
- 0499US11714648B2Systems for performing instructions to quickly convert and use tiles as 1D vectorsINTEL CORP·Filed 2021·Granted Aug 1, 2023·9 cites·45 claims
- 0599US11579880B2Systems for performing instructions to quickly convert and use tiles as 1D vectorsINTEL CORP·Filed 2021·Granted Feb 14, 2023·9 cites·25 claims
- 0699US11249761B2Systems and methods for performing matrix compress and decompress instructionsINTEL CORP·Filed 2020·Granted Feb 15, 2022·11 cites·24 claims
- 0799US10719323B2Systems and methods for performing matrix compress and decompress instructionsINTEL CORP·Filed 2018·Granted Jul 21, 2020·56 cites·20 claims
- 0898US11977886B2Systems, methods, and apparatuses for tile storeINTEL CORP·Filed 2022·Granted May 7, 2024·7 cites·20 claims
- 0998US11847452B2Systems, methods, and apparatus for tile configurationINTEL CORP·Filed 2021·Granted Dec 19, 2023·7 cites·20 claims
- 1098US11714642B2Systems, methods, and apparatuses for tile storeINTEL CORP·Filed 2022·Granted Aug 1, 2023·7 cites·19 claims
- 1198US11609762B2Systems and methods to load a tile register pairINTEL CORP·Filed 2021·Granted Mar 21, 2023·7 cites·26 claims
- 1298US11507376B2Systems for performing instructions for fast element unpacking into 2-dimensional registersINTEL CORP·Filed 2021·Granted Nov 22, 2022·10 cites·24 claims
- 1398US11416260B2Systems and methods for implementing chained tile operationsINTEL CORP·Filed 2020·Granted Aug 16, 2022·9 cites·21 claims
- 1498US11163565B2Systems, methods, and apparatuses for dot production operationsINTEL CORP·Filed 2017·Granted Nov 2, 2021·24 cites·20 claims
- 1598US11086623B2Systems, methods, and apparatuses for tile matrix multiplication and accumulationINTEL CORP·Filed 2017·Granted Aug 10, 2021·32 cites·20 claims
- 1698US10990396B2Systems for performing instructions to quickly convert and use tiles as 1D vectorsINTEL CORP·Filed 2018·Granted Apr 27, 2021·32 cites·22 claims
- 1798US10963256B2Systems and methods for performing instructions to transform matrices into row-interleaved formatINTEL CORP·Filed 2018·Granted Mar 30, 2021·25 cites·20 claims
- 1898US10896043B2Systems for performing instructions for fast element unpacking into 2-dimensional registersINTEL CORP·Filed 2018·Granted Jan 19, 2021·34 cites·20 claims
- 1998US10877756B2Systems, methods, and apparatuses for tile diagonalINTEL CORP·Filed 2017·Granted Dec 29, 2020·16 cites·20 claims
- 2098US10866786B2Systems and methods for performing instructions to transpose rectangular tilesINTEL CORP·Filed 2018·Granted Dec 15, 2020·27 cites·20 claims
- 2197US11645077B2Systems and methods to zero a tile register pairINTEL CORP·Filed 2021·Granted May 9, 2023·7 cites·31 claims
- 2297US11403071B2Systems and methods for performing instructions to transpose rectangular tilesINTEL CORP·Filed 2020·Granted Aug 2, 2022·7 cites·21 claims
- 2397US11200055B2Systems, methods, and apparatuses for matrix add, subtract, and multiplyINTEL CORP·Filed 2017·Granted Dec 14, 2021·14 cites·20 claims
- 2497US11093247B2Systems and methods to load a tile register pairINTEL CORP·Filed 2017·Granted Aug 17, 2021·22 cites·21 claims
- 2597US11080048B2Systems, methods, and apparatus for tile configurationINTEL CORP·Filed 2017·Granted Aug 3, 2021·14 cites·11 claims
- 2697US10970076B2Systems and methods for performing instructions specifying ternary tile logic operationsINTEL CORP·Filed 2018·Granted Apr 6, 2021·27 cites·22 claims
- 2797US10664287B2Systems and methods for implementing chained tile operationsINTEL CORP·Filed 2018·Granted May 26, 2020·25 cites·22 claims
- 2896US11579883B2Systems and methods for performing horizontal tile operationsINTEL CORP·Filed 2018·Granted Feb 14, 2023·17 cites·20 claims
- 2996US11567765B2Systems, methods, and apparatuses for tile loadINTEL CORP·Filed 2017·Granted Jan 31, 2023·8 cites·20 claims
- 3096US11288068B2Systems, methods, and apparatus for matrix moveINTEL CORP·Filed 2017·Granted Mar 29, 2022·7 cites·17 claims
- 3196US11023235B2Systems and methods to zero a tile register pairINTEL CORP·Filed 2017·Granted Jun 1, 2021·22 cites·25 claims
- 3295US11809869B2Systems and methods to store a tile register pair to memoryINTEL CORP·Filed 2017·Granted Nov 7, 2023·12 cites·22 claims
- 3395US11669326B2Systems, methods, and apparatuses for dot product operationsINTEL CORP·Filed 2017·Granted Jun 6, 2023·15 cites·21 claims
- 3495US11360770B2Systems, methods, and apparatuses for zeroing a matrixINTEL CORP·Filed 2017·Granted Jun 14, 2022·7 cites·20 claims
- 3595US11288069B2Systems, methods, and apparatuses for tile storeINTEL CORP·Filed 2017·Granted Mar 29, 2022·7 cites·17 claims
- 3695US11263008B2Systems, methods, and apparatuses for tile broadcastINTEL CORP·Filed 2017·Granted Mar 1, 2022·7 cites·20 claims
- 3795US9786338B2Multiple register memory access instructions, processors, methods, and systemsINTEL CORP·Filed 2016·Granted Oct 10, 2017·9 cites·20 claims
- 3895US8504802B2Compressed instruction formatVALENTINE ROBERT·Filed 2012·Granted Aug 6, 2013·20 cites·35 claims
- 3994US11816483B2Systems, methods, and apparatuses for matrix operationsINTEL CORP·Filed 2017·Granted Nov 14, 2023·11 cites·21 claims
- 4094US6883107B2Method and apparatus for disabling a clock signal within a multithreaded processorINTEL CORP·Filed 2002·Granted Apr 19, 2005·102 cites·49 claims
- 4193US12175246B2Systems and methods for performing matrix compress and decompress instructionsINTEL CORP·Filed 2023·Granted Dec 24, 2024·1 cites·18 claims
- 4293US8447962B2Gathering and scattering multiple data elementsHUGHES CHRISTOPHER J·Filed 2009·Granted May 21, 2013·36 cites·30 claims
- 4392US12260213B2Systems, methods, and apparatuses for matrix add, subtract, and multiplyINTEL CORP·Filed 2021·Granted Mar 25, 2025·1 cites·18 claims
- 4492US11789729B2Systems and methods for computing dot products of nibbles in two tile operandsINTEL CORP·Filed 2017·Granted Oct 17, 2023·7 cites·21 claims
- 4592US11442734B2Packed data element predication processors, methods, systems, and instructionsINTEL CORP·Filed 2021·Granted Sep 13, 2022·2 cites·26 claims
- 4692US11294671B2Systems and methods for performing duplicate detection instructions on 2D dataINTEL CORP·Filed 2018·Granted Apr 5, 2022·8 cites·25 claims
- 4792US10838734B2Apparatus and method for processing structure of arrays (SoA) and array of structures (AoS) dataINTEL CORP·Filed 2018·Granted Nov 17, 2020·8 cites·24 claims
- 4892US10282296B2Zeroing a cache lineINTEL CORP·Filed 2016·Granted May 7, 2019·7 cites·22 claims
- 4992US10163468B2Multiple register memory access instructions, processors, methods, and systemsINTEL CORP·Filed 2017·Granted Dec 25, 2018·5 cites·20 claims
- 5092US9513917B2Vector friendly instruction format and execution thereofINTEL CORP·Filed 2014·Granted Dec 6, 2016·10 cites·14 claims
Showing the top 50 of 249 patent records by PatentIndex Score.
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