Inventor · disambiguated record
Udo Walterscheidt
Also filed as: WALTERSCHEIDT UDO
6 granted patents·4 pending applications·38 citations·filing 2000–2006
79Inventor score
Top patents by PatentIndex Score
10 records- 0174US8024735B2Method and apparatus for ensuring fairness and forward progress when executing multiple threads of executionINTEL CORP·Filed 2002·Granted Sep 20, 2011·26 cites·40 claims
- 0257US7401211B2Method for converting pipeline stalls caused by instructions with long latency memory accesses to pipeline flushes in a multithreaded processorINTEL CORP·Filed 2000·Granted Jul 15, 2008·6 cites·11 claims
- 0351US7149881B2Method and apparatus for improving dispersal performance in a processor through the use of no-op portsINTEL CORP·Filed 2004·Granted Dec 12, 2006·3 cites·17 claims
- 0446US6721873B2Method and apparatus for improving dispersal performance in a processor through the use of no-op portsINTEL CORP·Filed 2000·Granted Apr 13, 2004·1 cites·17 claims
- 0546US2006168430A1Apparatus and method for concealing switch latencyINTEL CORP·Filed 2006·Application pending·0 cites
- 0642US7447877B2Method and apparatus for converting memory instructions to prefetch operations during a thread switch windowINTEL CORP·Filed 2002·Granted Nov 4, 2008·0 cites·38 claims
- 0741US7051191B2Resource management using multiply pendent registersINTEL CORP·Filed 2001·Granted May 23, 2006·2 cites·26 claims
- 0839US2002087844A1Apparatus and method for concealing switch latencyFiled 2000·Application pending·0 cites
- 0939US2003212881A1Method and apparatus to enhance performance in a multi-threaded microprocessor with predicationFiled 2002·Application pending·0 cites
- 1031US2006143374A1Pipelined look-up in a content addressable memoryKOTTAPALLI SAILESH·Filed 2004·Application pending·0 cites
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →