Inventor · disambiguated record
Farnaz Toussi
Also filed as: TOUSSI FARNAZ
6 granted patents·3 pending applications·13 citations·filing 2002–2014
75Inventor score
Top patents by PatentIndex Score
9 records- 0176US9454433B2Adaptive rebuild scheduling schemeIBM·Filed 2014·Granted Sep 27, 2016·4 cites·8 claims
- 0271US8037252B2Method for reducing coherence enforcement by selective directory update on replacement of unmodified cache blocks in a directory-based coherent multiprocessorIBM·Filed 2007·Granted Oct 11, 2011·7 cites·17 claims
- 0362US9396068B2Adaptive rebuild scheduling schemeIBM·Filed 2014·Granted Jul 19, 2016·1 cites·12 claims
- 0448US9137167B2Host ethernet adapter frame forwardingIBM·Filed 2013·Granted Sep 15, 2015·0 cites·9 claims
- 0545US7945739B2Structure for reducing coherence enforcement by selective directory update on replacement of unmodified cache blocks in a directory-based coherent multiprocessorIBM·Filed 2008·Granted May 17, 2011·0 cites·7 claims
- 0645US6874067B2Eliminating unnecessary data pre-fetches in a multiprocessor computer systemIBM·Filed 2002·Granted Mar 29, 2005·1 cites·12 claims
- 0745US2014160954A1Host ethernet adapter frame forwardingIBM·Filed 2012·Application pending·0 cites
- 0842US2008147977A1Design structure for autonomic mode switching for l2 cache speculative accesses based on l1 cache hit rateIBM·Filed 2008·Application pending·0 cites
- 0938US2008028150A1Autonomic Mode Switching for L2 Cache Speculative Accesses Based on L1 Cache Hit RateTOUSSI FARNAZ·Filed 2006·Application pending·0 cites
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →